Fault simulation of testing for board circuit failures

A method of simulating detection of faults in a digital circuit having functional self test code run by a processor in the circuit comprising the steps of:

• defining a logical probe for nets to be measured, for conditions to be satisfied before a measurement of the nets can be made, and for providing a duration of a time-limited measurement window during which said measurement takes place;
• simulating operation of the circuit including operation of the self test code for fault-free and a plurality of fault conditions;
• monitoring for a satisfaction of the defined conditions to be satisfied before measurement can be made;
• measuring values for the nets to be measured upon the satisfaction of the defined conditions during fault-free and faulty operation of the circuit;
• comparing a fault-free net value to the net values measured for each of the faults simulated;
• recording the fault-free value;
• and
• recording values different from the fault-free value together with a corresponding fault.

Apparatus for simulating detection of faults in a digital circuit comprising:

• simulator means for simulating circuit operation during fault-free and faulty operation;
• means for defining a logical probe for nets to be measured, for conditions to be satisfied before a measurement of the nets can be made, and for providing a duration of a time-limited measurement window during which said measurement takes place;
• means for monitoring for a satisfaction of the defined conditions to be satisfied before measurement can be made;
• means for measuring values for the nets to be measured upon the satisfaction of the defined conditions during fault-free and faulty operation of the circuit;
• and
• means for recording a fault-free value and a list of faults which can be detected.

Apparatus for simulating detection of faults in a digital circuit having functional self test code run by a processor in the circuit comprising the steps of:

• means for defining a logical probe for nets to be measured, for conditions to be satisfied before a measurement of the nets can be made, and for providing a duration of a time-limited measurement window during which said measurement takes place;
• means for simulating operation of the circuit including operation of the self test code for fault-free and a plurality of fault conditions;
• means for monitoring a satisfaction of the defined conditions to be satisfied before measurement can be made;
• means for measuring values of the nets upon the satisfaction of the defined conditions during fault-free and faulty operation of the circuit;
• means for comparing a fault-free net value to the net values measured for each of the faults simulated;
• means for recording the fault-free value;
• and
• means for recording values different from the fault-free value together with a corresponding fault.