Semiconductor integrated circuit and method of designing same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsTerukazu Yusa, Kazuhiro Sakashita, Isao Takimoto, Takeshi Hashizume, Tatsunori Komoike
Life of this patent
Estimating the term…
Abstract
Programmable logical blocks (3a to 3c) selected from a block library including information of a plurality of types of programmable logical blocks are disposed in a core region of a semiconductor integrated circuit (100). The degree of freedom of designing a field programmable gate array (FPGA) and the degree of integration are increased. A logic LSI is permitted to have redundancy to flexibly cope with design changes. This affords reduction in develop period and develop costs.
Claims31
A method of designing a semiconductor integrated circuit, comprising the steps of:
- (a) creating a macro cell library consisting of a plurality of macro cells, wherein each of said plurality of macro cells includes a plurality of predetermined logical functions and a plurality of logical functions in any macro cell in said library is different from a plurality of logical functions in any other cell in said library;
- (b) designing a design architecture for a programmable logic block;
- (c) fabricating said design architecture at a predetermined position of said semiconductor integrated circuit;
- wherein said step of designing comprises the sub-steps of:
- (1) retrieving a first one of said plurality of macro cells from said library and incorporating said first one of said plurality of macro cells into said design architecture;
- (2) retrieving a second one of said plurality of macro cells from said library and incorporating said second one of said plurality of macro cells into said design architecture, wherein said second one of said plurality of macro cells is different than said first one of said plurality of macro cells;
- (3) incorporating an access means for selectively accessing said programmable logic block into said design architecture;
- (4) incorporating a control means for controlling which of said plurality of predetermined logical functions is performed by said programmable logic block into said design architecture;
- and
- (5) incorporating a fixed logic function block into said design architecture, wherein said fixed logic function block provides a fixed logical function.
A method of designing a semiconductor integrated circuit model and for fabricating a corresponding semiconductor integrated circuit, comprising the steps of:
- (a) selecting a programmable logic block model from a library which stores different programmable logic block models;
- (b) disposing the programmable logic block model selected in step (a) in a predetermined position of said semiconductor integrated circuit model;
- and
- (c) repeating the steps (a) and (b) a predetermined number of times, resulting in different programmable logic block models being disposed in a plurality of different predetermined positions of said semiconductor integrated circuit model;
- wherein each one of said different programmable logic block models comprises a model of
- (1) means for performing a plurality of logical functions,
- (2) access means for accessing said plurality of logical functions, and
- (3) control means for controlling which one of said plurality of logical functions is performed by said one programmable logic block;
- wherein at least one of said different programmable logic block models disposed in said semiconductor integrated circuit model comprises a model for performing a different logical function from any model for performing logical functions in another one of said different programmable logic block models disposed in said semiconductor integrated circuit model;
- (d) disposing a fixed logic function block model at a predetermined location in said semiconductor integrated circuit model, wherein said fixed logic function block model is a model for performing a fixed logical function;
- and
- (e) fabricating said semiconductor integrated circuit in accordance with said semiconductor integrated circuit model.
A semiconductor integrated circuit, comprising:
- a core region;
- a first programmable logic block comprising means for performing a first plurality of logical functions;
- and
- a second programmable logic block comprising means for performing a second plurality of logical functions;
- a first control means, coupled to said first programmable logic block, for controlling which one of said first plurality of logical functions is performed by said first programmable logic block;
- a second control means, coupled to said second programmable logic block, for controlling which one of said second plurality of logical functions is performed by said second programmable logic block;
- access via control means, for controlling which one of said first programmable logic block and said second programmable logic block is accessed by an input signal;
- and
- a fixed logic function block consisting of means for performing a fixed logic function.
Dependencies are inferred from the claim text.