Integrated circuit component package with integral passive component
AssigneeUniversity of Southern California
InventorsRobert H. Parker, Richard J. Pommer
Life of this patent
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Abstract
A high-performance, high-density integrated circuit component package includes an IC chip having a plurality of IC bond pads and an interconnect substrate overlying the IC chip. The interconnect substrate includes a plurality of I/O surface pads arrayed across a surface of the interconnect substrate. The I/O surface pads are electrically connected to the IC bond pads via a plurality of traces internal to the interconnect substrate. The interconnect substrate further includes at least one layer comprising capacitive, resistive or inductive material integrally formed therein.
Claims24
A high-performance, high-density integrated circuit (IC) component package comprising:
- an IC chip having a plurality of IC bond pads extending along an outer periphery of said IC chip;
- an interconnect substrate bonded to said IC chip with a die attach, said interconnect substrate being mounted as an integral part of the component package and providing structural support to the component package, said interconnect substrate including:
- a plurality of I/O surface pads arrayed across a surface of said interconnect substrate, said I/O surface pads being electrically connected to said IC bond pads via a plurality of traces internal to said interconnect substrate;
- at least one layer comprising capacitive, resistive or inductive material integrally formed within said interconnect substrate, said at least one layer comprising capacitive material having a capacitance between 20 pF and 0.1 .mu.F, said at least one layer comprising resistive material having a resistance between 25.OMEGA. and 200 k.OMEGA., said at least one layer comprising inductive material having an inductance between 1 nH and 1,000 nH;
- and
- distinguishable power and ground planes integrally formed within said interconnect substrate;
- and
- a plurality of wire bonds between said traces and said IC bond pads.
The high-performance, high-density IC component package of claim i wherein said at least one layer includes a capacitive layer forming a discrete capacitor.
A high-performance, high-density integrated circuit (IC) component package comprising:
- an IC chip having a plurality of IC bond pads;
- and
- an interconnect substrate bonded to said IC chip with a die attach, said interconnect substrate being mounted as an integral part of the component package and providing structural support to the component package, said interconnect substrate including:
- a plurality of I/O surface pads arrayed across a surface of said interconnect substrate, said I/O surface pads being electrically connected to said IC bond pads via a plurality of traces internal to said interconnect substrate;
- and
- at least one layer comprising capacitive, resistive or inductive material integrally formed within said interconnect substrate, said at least one layer comprising capacitive material having a capacitance of at least 20 pF, said at least one layer comprising resistive material having a resistance of at least 25.OMEGA., said at least one layer comprising inductive material having an inductance of at least 1 nH.
A method of manufacturing a high-performance, high-density integrated circuit (IC) component package comprising the steps of:
- (a) providing an IC chip having a plurality of IC bond pads;
- (b) separately manufacturing an interconnect substrate including at least one layer comprising capacitive, resistive or inductive material integrally formed within the interconnect substrate, said interconnect substrate including a plurality of I/O surface pads arrayed across a surface of the interconnect substrate and a plurality of traces internal to the interconnect substrate;
- (c) thereafter bonding said interconnect substrate to said IC chip with a die attach;
- and
- (d) electrically connecting said I/O surface pads to said IC bond pads via said plurality of traces.
Dependencies are inferred from the claim text.