US 5,633,641 A · Analog to digital converter with continuous conversion cycles and large input signal range

Abstract

A successive approximation A/D having dual comparators for allowing a larger range of analog input signals to be converted into digital form. One comparator is an N-channel device, and the other comparator is a P-channel device. The A/D switches to either the N-channel device or the P-channel device based upon whether the first two comparisons the determine the most-significant bit and the next-most significant bit are a "11", in which the N-channel device is selected, or anything else, in which the P-channel device is selected. Switching circuitry is included to output the proper comparator based on these two comparisons. Control circuitry is also provided to allow for successive conversions using only a single address read. A one-half clock cycle reset occurs at the start of every MSB comparison for every n-bit read, and this reset goes to every component in the A/D except the latch for the LSB, which must be held for at least one more clock cycle before since it has not yet been output to the data bus as yet. Gate circuitry is also added to the input of the D/A portion of the A/D, in which the LSB is not allowed to be input to the D/A until after the MSB comparison has been performed for the next n-bit read.

Claims16

Dependent claims

A comparison circuit for a large dynamic range input signal, comprising:

a first comparator for receiving the input signal at a first input port thereof and a reference signal at a second input port thereof and for outputting a first comparison signal at an output port thereof based on a comparison of the input signal to the reference signal;
a second comparator for receiving the input signal at first input port thereof and the reference signal at a second input port thereof and for outputting a second comparison signal at an output port thereof based on a comparison of the input signal to the reference signal;
means for changing the reference signal based on a prior comparison of the input signal with the reference signal, wherein the reference signal is initially set to a mid-point value approximately one-half of the maximum allowable value of the input signal;
and
means for selecting one of the first comparison signal and the second comparison signal as a comparison signal for use by the changing means to update the reference signal,
wherein the first comparison signal is initially selected by the selecting means, and
wherein when the input signal is determined to be greater than the mid-point value, the second comparison signal is selected by the selecting means, and when the input signal is determined to be less than the mid-point value, the first comparison signal is selected by the selecting means.

4 more elements

A comparison circuit for a large dynamic range input signal, comprising:

a first comparator for receiving the input signal at a first input port thereof and a reference signal at a second input port and thereof for outputting a first comparison signal at an output port thereof based on a comparison of the input signal to the reference signal;
a second comparator for receiving the input signal at a first input port thereof and the reference signal at a second input port thereof and for outputting a second comparison signal at an output port thereof based on a comparison of the input signal to the reference signal;
means for changing the reference signal based on a prior comparison of the input signal with the reference signal, wherein the reference signal is initially set to a mid-point value approximately one-half of the maximum allowable value of the input signal;
and
means for selecting one of the first comparison signal and the second comparison signal as a comparison signal for use by the changing means to update the reference signal,
wherein the second comparison signal is initially selected by the selecting means, and
wherein when the input signal is determined to be greater than the mid-point value, the second comparison signal is selected by the selecting means, and when the input signal is determined to be less than the mid-point value, the first comparison signal is selected by the selecting means.

4 more elements

Dependencies are inferred from the claim text.

Analog to digital converter with continuous conversion cycles and large input signal range

Life of this patent

Analog to digital converter with continuous conversion cycles and large input signal range

Life of this patent

Abstract

Claims16