Clock system with internal monitor circuitry for secure testing

A clock system that is testable in a secure environment, the system comprising:

• a plurality of separately enableable clock generator circuit modules, each of said clock generator circuit modules generating a separate clock signal when enabled;
• combining circuitry that receives the separate clock signals from those clock generator circuit modules which are enabled and derives a derived clock signal therefrom;
• monitor circuitry that receives said derived clock signal, detects whether there are transitions in said derived clock signal, and provides a monitor indication signal that indicates a result of the detection;
• wherein said clock system can be tested without providing the separate clock signals outside the clock system, and further comprising:
• a programmable clock control register circuit that holds clock control data, the clock control data determining which of said clock generator circuit modules are enabled;
• and
• a processor connected to program said clock control data in said clock control register circuitry, said processor executing a program that programs said clock control data to enable and then disable each of said clock generator circuit modules one at a time and to sample said monitor indication signal while each of said clock generator circuit modules is enabled.

A clock system that is testable in a secure environment, the system comprising:

• a plurality of separately enableable clock generator circuit modules, each of said clock generator circuit modules generating a separate clock signal when enabled;
• combining circuitry that receives the separate clock signals from those clock generator circuit modules which are enabled and derives a derived clock signal therefrom;
• and
• monitor circuitry that receives said derived clock signal, detects whether there are transitions in said derived clock signal, and provides a monitor indication signal that indicates a result of the detection;
• wherein said clock system can be tested without providing the separate clock signals outside the clock system, and
• wherein said monitor circuitry comprises:
• a D-type flip flop having a clock input, a D input, and a Q output, the clock input being connected to receive the derived clock signal, the D input being connected to receive a signal having the second polarity;
• wherein the monitor indication signal at the Q output having the second polarity indicates that the derived clock signal has alternated from the first polarity to the second polarity.

A clock system that is testable in a secure environment, the system comprising:

• a plurality of separately enableable clock generator circuit modules, each of said clock generator circuit modules generating a separate clock signal when enabled;
• combining circuitry that receives the separate clock signals from those clock generator circuit modules which are enabled and derives a derived clock signal therefrom;
• monitor circuitry that receives said derived clock signal, detects whether there are transitions in said derived clock signal, and provides a monitor indication signal that indicates a result of the detection;
• a programmable clock control register circuit that holds clock control data, the clock control data determining which of said clock generator circuit modules are enabled;
• and
• a processor connected to program said clock control data in said clock control register circuitry, said processor executing a program that programs said clock control data to enable and then disable each of said clock generator circuit modules one at a time and to sample said monitor indication signal while each of said clock generator circuit modules is separately enabled.

A clock system that is testable in a secure environment, the system comprising:

• a plurality of separately enableable clock generator circuit modules, each of said clock generator circuit modules generating a separate clock signal when enabled;
• combining circuitry that receives the separate clock signals from those clock generator circuit modules which are enabled and derives a derived clock signal therefrom;
• and
• monitor circuitry that receives said derived clock signal, detects whether there are transitions in said derived clock signal, and provides a monitor indication signal that indicates a result of the detection;
• wherein
• said clock system can be tested without providing the separate clock signals outside the clock system;
• said monitor circuitry comprises a D-type flip flop having a clock input, a D input, and a Q output, the clock input being connected to receive the derived clock signal, the D input being connected to receive a signal having a second polarity;
• and
• wherein the monitor indication signal at the Q output having the second polarity indicates that the derived clock signal has alternated from a first polarity to the second polarity.