Multilayer wiring structure for attaining high-speed signal propagation
AssigneeKabushiki Kaisha Toshiba
InventorNaohiko Hirano
Life of this patent
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Abstract
Signal wiring layers are formed between a power supply layer and a ground layer, which have conductor patterns each constituted by a plurality of parallel strip-shaped conductors. The above layers are isolated from each other by insulating layers. The signal wiring layer has wires which are arranged in parallel with the parallel strip-shaped conductors of the conductor pattern of the power supply layer, and the signal wiring layer has wires which are arranged in parallel with the parallel strip-shaped conductors of the conductor pattern of the ground layer.
Claims15
A multilayer wiring structure for use in a semiconductor device, comprising:
- a potential supply layer including a plurality of parallel strip-shaped conductors, each of which has a predetermined potential;
- and
- a signal wiring layer provided on said potential supply layer, with an insulating layer interposed therebetween, said signal wiring layer including wires which are arranged in parallel with the parallel strip-shaped conductors.
A multilayer wiring structure which is made up of a power supply/ground layer and a signal wiring layer situated just below or just above said power supply/ground layer, and on which a plurality of semiconductor elements are mounted, the multilayer wiring structure comprising:
- a plurality of parallel strip-shaped conductors which are included in said power supply/ground layer;
- a plurality of wires which are included in said signal wiring layer, and arranged in parallel with the parallel strip-shaped conductors of said power supply/ground layer;
- and
- an insulating layer interposed between said power supply/ground layer and said signal wiring layer.
Dependencies are inferred from the claim text.