Signal compression or expansion circuit for mobile communication
AssigneeSony Corporation
InventorsTakaaki Yamada, Kazuo Kumano, Kazuhiro Takeda
Life of this patent
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Abstract
A signal-processing circuit adapted for signal compression and expansion performed in the transmitter and receiver of mobile communication equipment. The signal-processing circuit comprises a multiplication type D/A converter to which an analog signal is applied, a level detector circuit that detects the level of the analog signal, and an A/D converter. The D/A converter converts the analog input signal into an analog output signal having an amplitude corresponding to digital control data. The A/D converter digitizes the output signal from the level detector circuit and supplies it as said digital control data to the D/A converter. These circuits can be fabricated from CMOS circuits.
Claims9
A signal-processing circuit formed by CMOS processes, comprising:
- a logarithmically linear scale multiplication type CMOS digital-to-analog converter having a resistor bank which converts an audio range analog input signal applied to the converter into an analog output signal having an amplitude corresponding to digital control data;
- a level detector means for detecting the level of audio range, said level means having a full wave rectifier and an attack and recovery circuit;
- and
- a logarithmically linear scale analog-to-digital converter which digitizes the output signal from the level detector means and supplies the digitized signal as the above-described digital control data to the multiplication type digital-to-analog converter such that a level of an output signal is a square of a level of said analog signal applied to said converter, said analog-to-digital converter being a successive approximation type converter having a plurality of resistors and switches connected to perform an analog to digital conversion, said switches including switches connected between said resistors and switches connected at intermediate points along said resistors to provide fine or coarse adjustments of the steps.
A signal expansion or compression circuit formed by CMOS processes, comprising:
- a logarithmically linear scale multiplication type CMOS digital-to-analog converter having a resistor bank of resistors and a plurality Of switches connected to said resistor bank with ones of said switches connected between said resisters and others of said switches connected along said resistors to provide rough and fine levels and having an input for receiving an audio range analog signal and having a digital converter which converts an analog signal applied to the converter into an analog output signal having an amplitude corresponding to digital control data;
- a level detector circuit that detects the level of the audio range analog input signal, said level detector circuit including a full wave rectifier and an attack and recovery circuit;
- and
- an analog-to-digital converter which digitizes the output signal from the level detector circuit and supplies the digitized signal as the above-described digital control data to the multiplication type digital-to-analog converter such that a level of an output signal is a square of a level of said analog signal applied to said converter.
Dependencies are inferred from the claim text.