Symbol to byte converter
AssigneeZenith Electronics Corporation
InventorMark Fimoff
Life of this patent
Estimating the term…
Abstract
A symbol to byte converter converts multilevel symbols into data bytes. The bits of each M level symbol are written to a parallel register and read out serially to a serial register under control of an 8 times symbol clock. Successive groups of eight bits are read out in parallel from the parallel register with a byte clock to form the data bytes.
Claims15
A method of converting a series of binary M level symbols received at a constant symbol rate into successive 8 bit data bytes comprising:
- identifying M as one of a plurality of selected integer values for use in determining the number of binary bits associated with each of the symbols of said series of M level symbols;
- successively writing the bits of each of said M level symbols in parallel into a first register;
- serially reading said bits of said M level symbols from said first register;
- serially writing said bits into said second register in response to a bit clock generating a number of pulses equal to said determined number, at 8 times the symbol rate;
- dividing the pulses from the bit clock by 8;
- and
- reading out the bits in said second register in parallel in groups of 8 bits.
The method of converting a plurality of binary M level symbols received at a fixed symbol rate into a succession of 8 bit data bytes comprising:
- writing the bits of each symbol in parallel into a first register at the symbol rate;
- for each of said symbols, operating a variable pulse generator to generate a series of pulses, corresponding to the number of bits represented thereby, at 8 times the symbol rate;
- reading the bits from said first register and writing them serially into a second register under control of said pulses;
- developing a byte clock from said pulses for reading said second register;
- and
- reading every eight bits from said second register in parallel under control of said byte clock.
A converter for converting a plurality of binary M level symbols received at a fixed symbol rate into a succession of 8 bit data bytes comprising:
- variable pulse generator means for producing a series of pulses corresponding to the number of bits represented by said symbols at a bit clock rate equal to 8 times the symbol rate, for each symbol;
- a first register;
- a second register;
- means for writing the bits of each symbol in parallel into said first register at said fixed symbol rate;
- means for reading said bits from said first register and simultaneously writing said bits to said second register under control of said pulses;
- and
- means for reading each successive group of 8 bits from said second register in parallel to form said data bytes.
A converter for converting a plurality of binary M level symbols received at a fixed symbol rate into a succession of 8 bit data bytes comprising:
- decoder means for identifying the values of M from a plurality of selected integer values;
- variable pulse generator means for producing a series of pulses, for each symbol, corresponding to the number of bits represented by said identified value of M, at a bit clock rate equal to 8 times the symbol rate;
- a symbol clock operating at said symbol rate for controlling initiation of said variable pulse generator means;
- a first register;
- a second register;
- means for writing the bits of each symbol into said first register in parallel at said fixed symbol rate;
- means for serially reading said bits from said first register and serially writing said bits to said second register under control of said pulses;
- divider means for generating a byte clock from said pulses;
- and
- means for reading successive groups of eight of said bits from said second register in parallel under control of said byte clock.
Dependencies are inferred from the claim text.