Method of making combined JFET & MOS transistor device

A method of fabricating a semiconductor device on a semiconductor substrate of a first conductivity type, the method comprising the steps of:

• forming oxide on a selected region of the substrate to form a first insulating layer;
• depositing a gate material on the first insulating layer to form a gate electrode;
• forming first and second diffusion regions of a second conductivity type in the substrate separated by substrate material below said first insulating layer;
• forming a second insulating layer of oxide on the gate electrode with substantially horizontal surfaces and substantially vertical surfaces;
• anisotropically etching the second insulating layer of oxide to remove the horizontal surfaces of the second insulating layer;
• forming on the substrate immediately contiguous to the vertical surfaces of the second insulating layer a second layer of gate material of the first conductivity type to form semiconductor junctions with the first and second diffusion regions as a junction field effect transistor (JFET) gate;
• and
• forming source and drain diffusion regions of the second conductivity type in the semiconductor substrate with the source and drain diffusion regions laterally separated by said gate electrode the JFET gate.