Method for fabricating an elevated-gate field effect transistor

A method for fabricating a field effect transistor on a compound semiconductor substrate having an active layer disposed in a surface portion of said substrate and a gate layer formed directly on said active layer, said gate layer dividing said active layer into first and second portions, comprising the steps of:

• etching said active layer to provide a recessed surface of said first portion of said active layer and an elevated platform, said recessed surface of said first portion disposed below a bottom surface of said gate layer and said elevated platform self-aligned to said gate layer and said gate layer disposed on said elevated platform;
• forming a spacer adjacent to and on a side of said gate layer;
• forming source and drain regions in said active layer on opposite sides of said gate layer wherein said source region is self-aligned to said spacer;
• and
• wherein said active layer is doped with the same dopant type in both a first region underneath said gate layer and in a second region underneath said spacer.