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US 5,630,098 AGranted
System and method for interleaving memory addresses between memory banks based on the capacity of the memory banks
AssigneeNCR Corporation
InventorsFulps V. Vermeer, Edward C. King
Life of this patent
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Abstract
The invention is a system and method for accessing a plurality of memory banks. The system includes a number of memory banks, a register and a controller. The register stores capacity information of each memory bank. The controller is connected to the register and memory banks and uses the capacity information to determine whether or not addresses are to be interleaved between a pair of memory banks. If the memory banks are of similar capacities, the addresses may be interleaved therebetween.
Claims11
A computer memory system comprising:
- a plurality of memory banks;
- a register for storing data representing the capacity of each bank;
- and
- a controller connected to said register and banks for determining, from the data stored in said register, whether or not addresses are to be interleaved between a pair of banks, said controller comprising:
- an address router for receiving a first address having a plurality of bit positions and for assigning said bit positions to row and column addresses in response to the capacity of each bank stored in the register.
2 more elements
A computer memory system comprising:
- a plurality of memory banks, each of said banks having a plurality of slots, each slot being connectable to a memory chip, and each slot in a given bank being connected to chips having the same capacity;
- a register for storing data representing the capacity of each bank;
- and
- a controller connected to said register and banks for determining, from the data stored in said register, whether or not addresses are to be interleaved between a pair of banks, said controller including:
- an address router for receiving a first address having a plurality of bit positions and for assigning said bit positions to row and column addresses in response to data stored in said register;
- and
- an address counter connected to said router for receiving an incoming address and burst signal and generating said first address and a plurality of sequential first addresses therefrom.
4 more elements
Dependencies are inferred from the claim text.