US 5,630,045 AGranted

Device and method for fault tolerant dual fetch and store

AssigneeInternational Business Machines Corporation

InventorsMatthew A. Krygowski, Arthur J. Sutton

Life of this patent

Estimating the term…

Loading patent…

Abstract

Fault tolerant systems allow continuous service during the occurrence of a hardware failure. To provide such service, usually dual copies of data are stored in case of a hardware failure affecting the original copy. This dual copying causes the system an overall performance degradation. The present invention discloses a device and method for performing parallel fetch and store commands, allowing multiple copying of data into storage without affecting the performance of the system. In one embodiment of the invention, a method is described utilizing a multiprocessor system having two system controllers (SCs) and a plurality of requestors defined as a plurality of central processors (CPs) and input-output (I/O) processors. Asymmetric structure is accomodated. Single and dual requests can be intermixed. Each requestor has access to both system controllers, allowing either controller to process a requestor issued command. An interlocking data protection mechanism is also provided to protect data integrity by allowing requestors data access to a given unit of data only on a one at a time basis. Data exclusivity ownership access to a given unit of data is being provided by and removed by the system controllers. When a command is issued by one of the requestors, the system controllers process the command and provide the requestor with a response upon processing completion. In the mean time, the requestor can perform any required data updates. This concurrent processing improves the performance of the system but also protects its integrity.

In a multiprocessor system with at least one memory unit, having at least two memory controllers and a plurality of input-output (I/O) processors, each of I/O processors being defined as a requestor, a method of concurrently allowing parallel fetch and store commands, comprising the steps of:

performing an initialization step during which separate portions in said memory unit are set aside, each portion being designated to each of said memory controllers for its use;
storing physical addresses of each said memory portion in a logic array in said memory unit so that said memory portions can be accessed at any time;
protecting data stored in each of said memory portions by an interlocking data protection mechanism so that only one of said requestors can access said data previously stored at any one time, said interlocking data protection mechanism providing an exclusivity ownership access status for said unit of data so that it can only be accessed and used only by one requestor at any one time;
selecting one of said memory controllers as a primary controller and said other remaining memory controller as a secondary memory controller, said selection being identified in a configuration array associated with each of said requestors;
said primary memory controller performing cross interrogation services and then synchronizing with said secondary memory controller as to ensure data integrity as well as keeping said same exclusive ownership for their assigned data;
allowing each of said memory controller process a fetch or a store request issued by said requestors concurrently, said memory controllers accessing data stored in their respective designated memory portion;
both of said memory controllers signalling a response to said requestor upon processing completion;
said requestor waiting to receive both a first response message and any data requested from said primary memory and a second response message from said secondary memory controller;
and
said memory controllers removing said exclusivity ownership status upon said requestor's receipt of said processing completion response.

7 more elements

Abstract

Claims7