Control circuit for driving motor with reduced power consumption and disk unit having the control circuit

A disk unit comprising:

• a motor;
• a driving circuit, coupled to said motor, for driving said motor in response to a control signal and an excitation current to be supplied to said motor;
• and
• a control circuit, coupled to said driving circuit, comprising:
• first means for generating the excitation current having a predetermined period that is dependent on a predetermined rotation period of said motor, said excitation current including first excitation pulses having a period and second excitation pulses having a period, said second excitation pulses having a phase which lags a phase of the first excitation pulses by 90.degree.;
• and
• second means, coupled to said first means, for superimposing, on said first excitation pulses, pulses having a period that is small compared to said period of said first and second excitation pulses.

A disk unit comprising:

• a motor;
• a driving circuit, coupled to said motor and including an output transistor, driving said motor in response to a control signal and an excitation current to be supplied to said motor;
• and
• a control circuit, coupled to said driving circuit, comprising:
• first means for generating the excitation current having a predetermined period that is dependent on a predetermined rotation period of said motor, said excitation current including first excitation pulses having a period and second excitation pulses, having a period, said second excitation pulses having a phase which lags a phase of the first excitation pulses by 90.degree., said first and second pulses being formed by signal inversion;
• and
• second means, coupled to said first means, for increasing an ON-resistance of the output transistor within said driving circuit in a period dependent on said period of said first and second excitation pulses by supplying a voltage to the driving circuit, said voltage assuming a high level simultaneously when the first excitation pulses and the second excitation pulses are inverted and assuming a low level at a predetermined time before the first excitation pulses and the second excitation pulses are subsequently again inverted.

A disk unit comprising:

• heads for recording and reproducing signals on and from a disk;
• a control circuit including an oscillator circuit generating a reference clock signal that is supplied to at least one part of the disk unit;
• and
• a recording and reproducing circuit including a voltage detection circuit monitoring a deviation of a power supply voltage and a circuit supplying driving currents to said heads,
• said oscillator circuit and said voltage detection circuit stopping operation in response to a sleep mode signal which instructs the disk unit to assume a sleep mode, said disk unit in the sleep mode waiting for an instruction and said control circuit controlling said recording and reproducing circuit to stop supplying the driving current to said heads.