Signal multiplexing apparatus using multiconnection

A signal multiplexing apparatus using multiconnection, comprising:

• input signal interface means for inputting a DS1 or DS1E signal, a video signal and an ATM cell signal;
• input signal processing multiport memory means connected to testing/central processing means;
• input signal control means connected to said input signal processing multiport memory means, said input signal control means including a microprocessor and peripheral devices to operate in response to timing signals from said input signal interface means and buffer synchronization and control signals from said testing/central processing means, said peripheral devices including a read only memory, a random access memory, a timer and an interrupt control circuit, said timing signals including a clock signal, a data synchronous signal and a frame synchronous signal;
• and
• output signal address generation/multiplexing means responsive to the buffer synchronization and control signals from said testing/central processing means, for reading data from said input signal processing multiport memory means and multiplexing the read data into a desired format, said output signal address generation/multiplexing means generating address and applying the generated addresses to multiconnection multiport memory means.