Semiconductor memory device and method of operation thereof

A semiconductor memory device having at least one memory cell, said at least one memory cell comprising:

• at least one switching element having first, second and control terminals;
• and
• a plurality of capacitive elements each having a first terminal connected to said first terminal of said switching element;
• wherein at least one of said plurality of capacitive elements is a ferroelectric capacitive element, and at least another of said plurality of capacitive elements is a capacitive element other than a ferroelectric capacitive element.

A semiconductor memory device comprising:

• a) at least one memory cell having at least one switching element, said at least one switching element having first, second and control terminals, and a plurality of capacitive elements, each of said plurality of capacitive elements having a first terminal connected to said first terminal of said switching element, and at least two of said plurality of capacitive element being ferroelectric capacitive elements;
• and
• b) control means for:
• establishing respective first operating states, for each of said capacitive elements, said respective first operating states of said at least two of said plurality of capacitive elements corresponding to a respective first polarization;
• and
• selectively applying a first voltage to a second terminal of a selected at least one of said capacitive elements and a second voltage, different from said first voltage, to a second terminal of said capacitive elements other than said selected at least one of said capacitive elements;
• whereby said control means is arranged to change said selected one of said capacitive elements to a second operating state corresponding to a second polarization, and to hold said capacitive elements other than said selected at least one of said capacitive elements in said respective first operating state.