Pipeline type analog to digital converter including plural series connected analog to digital converter stages

A pipeline type analog to digital converter comprising:

• plural analog to digital converter stages connected in series, each stage comprising an analog to digital converter block for analog to digital converting an analog input signal to a digital signal of a predetermined number of bits and for digital to analog converting a result of the analog to digital conversion to output the digital to analog conversion result, said analog to digital converter block of the first stage directly receiving an analog input signal to be subjected to analog to digital conversion;
• said analog to digital converter block of said first stage comprising a ladder-type resistor composed of plural serially connected resistors, and voltage comparators provided in correspondence to each of predetermined taps of said ladder-type resistor, said voltage comparators sampling said analog input signal at a certain timing and comparing the sampled analog input signal and a corresponding reference tap voltage at a time of holding;
• and
• said pipeline type analog to digital converter further comprising, in a path between said analog to digital converter block of said first stage and said analog to digital converter block of second stage,
• S/H & subtracting means for sampling said analog input signal at said certain timing and, at said time of holding, for performing subtraction of a digital to analog output of said analog to digital converter block of said first stage and the sampled analog input signal to output the result of said substraction, and
• amplifying means for amplifying an output of said S/H & subtracting means to output as the input signal of said analog to digital converter block of said second stage an output obtained on the basis of the amplification.

A pipeline type analog to digital converter comprising:

• a plurality of analog to digital converter stages connected in series, each stage comprising an analog to digital converter block for analog to digital converting an analog input signals to a digital signal of a predetermined number of bits and for digital to analog converting a result of the analog to digital conversion to output a digital to analog conversion result, said analog to digital converter block of the first stage directly receiving an analog input signal to be subjected to analog to digital conversion, and comprising a ladder-type resistor composed of plural serially connected resistors;
• and
• said pipeline type analog to digital converter further comprising, in a path between said analog to digital converter block of said first stage and said analog to digital converter block of the second stage,
• first S/H & subtracting means for sampling said analog input signal at a same timing as that of said analog to digital converter block of said first stage, for outputting a predetermined voltage value during sampling and, during holding, for subtracting a difference between the sampled value of said analog input signal and a value of the digital to analog output output by said analog to digital converter block of said first stage from said predetermined voltage value to output corresponding subtraction results;
• second S/H & subtracting means for sampling two specific tap voltages in said ladder-type resistor at said same timing and outputting said predetermined voltage value during sampling and, during holding, for subtracting a difference between said intermediate reference tap voltage and said two specific tap voltages from said predetermined voltage value thereby to output corresponding subtraction results;
• and
• differential amplifying means for receiving outputs of said first and second S/H & subtracting means to obtain respective differential signals of said outputs and for outputting said differential signals to said analog to digital converter block of said second stage as said input signals and as reference signals, respectively.

A pipe line type analog to digital converter comprising:

• plural analog to digital converter stages connected in series, each stage comprising,
• an input signal differential amplifier having first and second inputs and first and second outputs and a reference voltage differential amplifier having first and second inputs and first and second outputs, both provided between successive stages for performing complementary differential operations, and
• an analog to digital converter block, comprising a ladder-type resistor having opposite ends coupled to two differential outputs of said reference voltage differential amplifier, and differential inputs for receiving two differential outputs of said input signal differential amplifier as input signals, for analog to digital converting said input signals to a result having a predetermined bit number and digital to analog converting the analog to digital conversion result and outputting the digital to analog conversion result, said ladder-type resistor having plural predetermined taps determined according to said predetermined bit number,
• each analog to digital converter block comprising,
• a comparison differential amplifier, having first and second inputs and first and second outputs, for comparison of voltages,
• a first switch provided between the first input and the first output of said comparison differential amplifier, for turning "on" when said input signal differential amplifier outputs said input signals and a bias voltage is applied to first and second inputs of said reference voltage differential amplifier, and for turning "off" when said reference voltage differential amplifier outputs two outputs at its first and second outputs and said bias voltage is applied to first and second inputs of said input signal differential amplifier,
• a second switch which is provided between the second input and the second output of said comparison differential amplifier, for turning "on" when said input signal differential amplifier outputs said input signals at its first and second outputs and said bias voltage is applied to the first and second inputs of said reference voltage differential amplifier, and for turning "off" when said reference voltage differential amplifier outputs said two outputs and said bias voltage is applied to the first and second inputs of said input signal differential amplifier,
• a first coupling capacitor having one end connected to said first input of said comparison differential amplifier and an other end connected to the first output of said input signal differential amplifier,
• a second coupling capacitor having one end connected to said first input of said comparison differential amplifier and another end connected to an other predetermined tap corresponding to the respective predetermined tap,
• a third coupling capacitor having one end connected to said second input of said comparison differential amplifier and another end connected to said predetermined tap, and
• a fourth coupling capacitor having one end connected to said second input of said comparison differential amplifier and another end connected to said second output of said input signal differential amplifier,
• a potential difference between a voltage at said predetermined tap and an intermediate reference tap voltage being equal to a potential difference between a voltage at said other predetermined tap and said intermediate reference tap voltage,
• said intermediate reference tap voltage corresponding to an average value of respective voltage values at both ends of said ladder-type resistor, and
• said first to fourth coupling capacitors all having one same capacity value.

A pipeline type analog to digital converter comprising:

• plural analog to digital converter stages connected to series, each stage comprising,
• an analog to digital converter block having a ladder-type resistor for analog to digital converting two input signals to a result having a predetermined number of bits, for digital to analog converting the analog to digital conversion result to output a digital to analog conversion result, and for transmitting, as reference voltages, reference tap voltages at two specific points of said ladder-type resistor to the next stage;
• and
• said pipeline type analog to digital converter further comprising, in a path between the stage preceding the final stage and said final stage,
• a first switch for selectively outputting one of said input signals transmitted form said stage preceding said final stage, two digital to analog output signals output by said analog to digital converter block of said stage preceding said final stage, a bias voltage and one of said reference tap voltages;
• a second switch for selectively outputting an other of said input signals, said two digital to analog output signals, said bias voltage and an other of said reference tap voltages;
• a first coupling capacitor having one end connected to an output of said first switch and an other end receiving said bias voltage in synchronization with the output of said one of said input signals from said first switch;
• a second coupling capacitor having one end connected to an output of said second switch and an other end receiving said bias voltage in synchronization with the output of the other of said input signals from said second switch;
• and
• a differential amplifier having a one input connected to an other end of said first coupling capacitor, and other input connected to the other end of said second coupling capacitor, and first and second outputs being applied as said input signals to said analog to digital converter block of said final stage.