Low-power, tristate, off-chip driver circuit

An output driver circuit for a semiconductor chip, comprising:

• a) a predriver circuit having a data input, an enable input, a first data output, and a second data output;
• b) a push-pull output circuit having an output node for coupling to an off-chip connection, and having first and second inputs, said first input of said output circuit being coupled to receive said first data output of said predriver circuit;
• wherein said push-pull circuit includes a P-channel pull-up transistor and an N-channel Pull-down transistor, said first input of said push-pull output circuit connected to a gate of said P-channel pull-up transistor, said second input of said push-pull output circuit being connected to a gate of said N-channel pull-down transistor;
• c) a first compensator circuit having inputs coupled to said data input, said enable input, and said first data output of said predriver circuit;
• and
• d) a second compensator circuit having inputs coupled to said data input, said enable input, and said second data output of said predriver circuit;
• said first and second compensator circuits preventing change of voltage on said first and second inputs of said push-pull output circuit at a rate as high as the rate of change of voltage at said first and second data output;
• and
• e) a feedback circuit from a drain node of said pull-down transistor to a third input of said first and second compensating circuits, said feedback circuit causing said compensator circuits to cease the compensating function after a selected delay following a transition of the voltage on said output node.

A driver circuit comprising:

• a) a predriver circuit having a data input, and having data output means;
• b) an output driver circuit having an input coupled to said data output means of said predriver circuit which includes a stack of diodes connected in a forward direction between the output driver circuit and a terminal of a voltage supply;
• c) a compensation circuit coupled to said predriver circuit and said output driver circuit;
• d) clamping means, coupled to said driver circuit, for limiting the voltage to which said circuits in said driver circuit may be exposed during operation.