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US 5,629,547 AGranted
BICMOS process for counter doped collector
AssigneeIntel Corporation
InventorsStephen T. Chambers, Richard G. Taylor
Life of this patent
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Abstract
A BiCMOS process where a base region is formed in a relatively highly doped n-type substrate region. Boron is implanted at two different energy levels to form the base region and a counter doped n region near the base collector junction to prevent impact ionization.
Claims4
A BiCMOS integrated circuit comprising:
- a bipolar transistor comprising:
- a collector region formed in a first substrate region having a first doping level of a first conductivity type;
- a lightly doped collector region formed in said first substrate region, said lightly doped collector region having a second doping level of said first conductivity type wherein said second doping level is less than said first doping level;
- a base region of a first doping level of a second conductivity type formed in said first substrate region over said lightly doped collector region;
- and
- an emitter region of a third doping level of said first conductivity type formed in said base region over said lightly doped collector region;
- and
- a field effect transistor comprising:
- a source region and a drain region formed in a second substrate region wherein said second substrate region has said first conductivity type and said first doping level.
6 more elements
Dependencies are inferred from the claim text.