Electrostatic discharge protection in integrated circuits, systems and methods

An electrostatic discharge protection circuit for an integrated circuit, comprising:

• a substrate of a first conductivity type having a first and a second bond pad;
• a field effect transistor having a source and drain provided on said substrate, each of opposite conductivity type from said substrate;
• a tank of opposite conductivity type from said substrate and located in said substrate;
• first, second and third regions located in said tank and of the same conductivity type as said tank and of greater conductivity than said tank;
• fourth and fifth regions located in said tank and of opposite conductivity type to said tank wherein said first and fourth regions are connected to said first bond pad, said second and fifth regions are connected to each other, and said third region is joined to said drain of field effect transistor, and said source of said field effect transistor is further connected to said second bond pad.

An integrated circuit comprising:

• a semiconductor die having a substrate having at least one tank of opposite conductivity type to said substrate and at least first and second bond pads;
• an internal circuit fabricated on said semiconductor die and connected to said first bond pad;
• an electrostatic discharge protection circuit connected between said first and second bond pads including cascaded bipolar transistors wherein a first of said cascaded transistors has an emitter connected to a base of a second of said cascaded transistors, and a field effect transistor connected to a base of said first cascaded transistor such that a current flowing through said field effect transistor in response to a voltage breakdown in said field effect transistor is amplified by said first of said cascaded transistors and an amplified current flowing through said first cascaded transistor is amplified by at least said second of said cascaded transistors, whereby the internal circuit is protected from voltage breakdown;
• wherein said cascaded bipolar transistors are fabricated with an emitter and base in said tank and wherein said substrate forms a collector for said bipolar transistors whereby a portion of said nmplified current goes into said substrate;
• and
• wherein said field effect transistor has a semiconductive region crossing into said tank and forming part of one of said cascaded bipolar transistors.

A method for providing protection from electrostatic discharge comprising:

• providing an integrated circuit having a substrate, an internal circuit, and at least two bond pads;
• connecting at least two bipolar transistors and a field effect transistor in series between two of said bond pads such that a current conducted by said field effect transister will be amplified by said bipolar transistors and said amplified current will be absorbed by said substrate;
• and
• conducting current through said field effect transistor in response to said electrostatic discharge as a result of a voltage breakdown in said field effect transistor such that a bulk of current produced by said electrostatic discharge is absorbed by said substrate and said field effect transistor and said internal circuit is protected from damage.

An electronic system comprising:

• a printed circuit board and an integrated circuit;
• wherein said printed circuit board further comprises at least first and second conductors thereon, said first conductor connected to carry a supply voltage of a first level to said integrated circuit having a first set of supply pins connected to said first conductor and a second set of supply pins connected to said second conductor, and said integrated circuit having internal circuits connected to said first and second sets of supply pins;
• wherein said integrated circuit further comprises a substrate and an electrostatic discharge protection circuitry formed in said substrate including a network of interconnected transistors and diodes connected to said first and second sets of supply pins, wherein at least one of said interconnected transistors of said electrostatic discharge protection circuitry is a bipolar transistor connected between at least two of said supply pins in said first set;
• and
• wherein said integrated circuit further comprises a signal pin and said electrostatic discharge protection circuitry further comprises electrostatic protection diode structures connecting said substrate to a pin in said first set and to a pin in said second set and to said signal pin.

An integrated circuit comprising:

• a substrate;
• a first set of supply pins connected for a first supply voltage level and a second set of supply pins connected to said substrate for a second supply voltage level;
• said integrated circuit having internal circuits connected to said first and said second set of supply pins;
• an electrostatic discharge protection circuit connected between at least two of said supply pins in said first set of supply pins, wherein said electrostatic discharge protection circuit includes a bipolar transistor, said substrate acting as a collector for said bipolar transistor;
• and
• a signal pin and electrostatic protection diode structures connecting said substrate to a pin in said first set and to a pin in said second set and to said signal pin.