Methods for producing a chip carrier and terminal electrode for a circuit substrate
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsYoshihiro Tomura, Yoshihiro Bessho, Yasuhiko Hakotani
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Abstract
A chip carrier according to the present invention includes: a carrier body including an upper face, a lower face, and an internal conductor; and a plurality of terminal electrodes formed on the upper face of the carrier body, the plurality of terminal electrodes electrically connecting an LSI chip to the internal conductor. A plurality of concave portions for electrically connecting a plurality of electrodes on a circuit substrate to the internal conductor are provided on the lower face of the carrier body, the concave portions being electrically connected to the internal conductor.
Claims12
A method for producing a chip carrier comprising the steps of:
- forming via holes in a plurality of unsintered green sheets;
- burying a portion of an internal conductor in the via holes of a group of the plurality of green sheets and forming an internal conductor on the group of the plurality of green sheets by printing;
- obtaining a multilayer structure by layering one of the plurality of green sheets in which a portion of the internal conductor is not buried in the via holes thereof on the group of green sheets in which the portion of the internal conductor is buried in the via holes and subjecting the multilayer structure to a pressing process;
- and
- sintering the plurality of green sheets so as to form a carrier body, a plurality of concave portions being formed on a lower face of the carrier body.
A method for producing a terminal electrode for a circuit substrate, the method comprising the steps of:
- forming a first resist film on the circuit substrate by a first photolithography process, the first resist film having a first opening on an electrode pad of the circuit substrate;
- forming a lower step portion of the terminal electrode in the first opening of the first resist film;
- forming a second resist film on the circuit substrate by a second photolithography process, the second resist film having a second opening on the lower step portion of the terminal electrode and the second opening being smaller than the first opening of the first resist film;
- forming an upper step portion of the terminal electrode in the second opening of the second resist film;
- and
- removing the first and second resist films, whereby the terminal electrode is formed.
Dependencies are inferred from the claim text.