Memory system having non-volatile data storage structure for memory control parameters and method

A method of controlling operation of a memory system which includes an array of memory cells arranged in a multiplicity of rows and a multiplicity of columns, with each cell located in one of the rows being coupled to a common word line and each cell in one of the columns being coupled to a common bit line, the method comprising the following steps:

• sensing when an external mode control signal is applied to a terminal of the memory system having a voltage magnitude which falls outside a normal operating range of voltage applied to the terminal when the memory system is in a normal operating mode;
• switching the memory system from the normal operating mode to an alternative operating mode subsequent to the sensing of the mode control signal;
• storing a plurality of control parameters in non-volatile data storage units separate from the array by applying control parameter data to terminals of the memory system;
• switching the memory system from the alternative operating mode to a normal operating mode;
• programming data into the array utilizing the control parameters;
• reading data from the array utilizing the control parameters;
• switching the memory system from the normal operating mode to the alternative operating mode;
• and
• modifying the stored control parameters.

A memory system comprising:

• an array of memory cells arranged in a multiplicity of rows and columns;
• a memory controller, operably coupled to the array of memory cells, configured to control reading and programming operations on the array of memory cells, with the reading and programming operations being controlled in response to control parameters;
• memory terminals for providing an interface between the memory system and an environment external to the memory system;
• a data storage structure, operably coupled to the memory controller, said data storage structure configured to store the control parameters;
• and
• switching mode circuitry configured to switch the memory system between a normal operating mode wherein the memory reading and programming operations can be carried out and wherein the control parameter data cannot be altered and an alternative operating mode wherein the control parameters stored in the data storage structure can be altered, with the switching mode circuitry comprising sense circuitry configured to sense application of a mode control signal to at least one of the terminals of the memory system having a voltage magnitude which falls outside a voltage range of signals applied to the terminal when the memory system is in the normal operating mode, with the switching mode circuitry being configured to switch the memory system to the alternative operating mode in response to the sensing of the application of the mode control signal.

A flash memory system implemented in an integrated circuit, said memory system comprising:

• a multiplicity of memory terminals for providing an interface between the integrated circuit and an environment external to the integrated circuit;
• an array of flash memory cells arranged in a multiplicity of rows and columns;
• a memory controller, operably coupled to the array of flash memory cells, said memory controller configured to carry out memory programming operations and memory erasing operations by application of voltage pulses to the array of flash memory cells, with the voltage pulses having characteristics that are controlled by a multiplicity of control parameters;
• a multiplicity of data storage units configured to store the control parameters, with each of the data storage units having an input operably coupled to a separate one of the memory terminals;
• and
• mode control circuitry configured to switch the memory system between a normal operating mode where the memory programming, erasing and reading operations can be carried out and an alternative operating mode where the control parameters can be altered by way of the memory terminals.

A method of controlling operation of a memory system having an array of memory cells arranged in a multiplicity of rows and columns, the method comprising the following steps:

• decoding commands issued to the memory system, comprising memory program and memory erase commands, using command decoding circuitry;
• placing the memory system in an alternative operating mode independent of the command decoding circuitry;
• applying control parameters to a group of terminals of the memory system;
• transferring the applied control parameters from the terminals of the memory system to volatile elements of data storage units separate from the array of memory cells;
• transferring the control parameters from the volatile elements to non-volatile elements of the data storage units;
• switching the memory system from the alternative operating mode to a normal operating mode;
• and
• programming data into the array of memory cells using the stored control parameters by applying programming data and programming addresses to at least some of the terminals of the group of terminals.