Convolutional digital to analog converter

A digital to analog converter for generating a smoothed signal having a limited high frequency spectrum, said converter receiving incoming data on a data bus and being clocked by a clock signal of frequency Fb, characterized in that it comprises:

• means (10) for receiving said incoming data and for splitting it into N units data, said means being composed of N shift registers and N data buffers, the N shift registers sorting the incoming data to store successive of units of the N data in successive data buffers;
• means (11) for splitting the clock signal (Fb) into N signals having a frequency equal to Fb/N with a phase delay of N/Fb respective to each other, each said signal clocking a specific data buffer;
• means (13) comprising N multiplying digital to analog converters (DACs) being delayed by a phase T=N/Fb, each said multiplying DAC receiving data from the corresponding data buffer through a data bus;
• and
• means (12) for providing N multiplier generators, each one using identical periodic functions (M1, . . . , Mn) of period N/Fb, the phase of each multiplier generator being shifted by a delay of N/Fb respective to the previous generator according to the corresponding phase of the clock splitter, each said multiplier generator being clocked by the corresponding clock signal of frequency (Fb/N) for modulating the multiplying DAC reference with periodic signals (G1, . . . Gn) which are convoluted with the digital inputs.