US 5,627,536 AGranted

Multiplexed delta-sigma modulator

AssigneeAdvanced Micro Devices, Inc.

InventorSergio R. Ramirez

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Abstract

A multiplexed delta-sigma modulator for performing analog to digital conversion on a plurality of input analog signals. These input analog signals are input to a multiplexer, where the input analog signals are converted into a single, time-division multiplexed analog signal. The time-division multiplexed analog signal is then received by the delta-sigma modulator, which oversamples the input signal and outputs a time-division multiplexed digital signal. The time-division multiplexed digital signal is then sent to a decimator which outputs a time-division multiplexed digital signal at a rate corresponding to the Nyquist rate of the input analog signals. The signal is sent from the decimator to a first down-sampler, and then to a demultiplexer, where the time-division multiplexed, decimated signal is sent to the appropriate output port of the demultiplexer at a sequential rate corresponding to the sequential rate utilized by the input multiplexer. At each output port of the demultiplexer there is a second down-sampler operating at a predetermined rate to recover each of the plurality of digital output signals corresponding to the plurality of input analog signals.

Claims21

Dependent claims

A system comprising:

an multiplexer having a plurality of input ports and a single output port, said multiplexer receiving an analog signal on each respective one of said plurality of input ports, said multiplexer selecting said analog signal on each of said plurality of input ports at a first predetermined rate, and outputting a time-division-multiplexed analog signal,
a delta-sigma modulator connected to receive said time-division multiplexed analog signal on an input port thereof, said delta-sigma modulator sampling said time-division multiplexed analog signal at a second predetermined rate, and outputting a time-division multiplexed modulated signal on an output port,
a decimator connected to receive said time-division multiplexed modulated signal, and outputting an n-bit time-division multiplexed digital signal at a third predetermined rate,
a first down-sampler connected to sample said n-bit time-division multiplexed digital signal, and outputting a first down-sampled signal at a fourth predetermined rate,
a demultiplexer connected to receive said first down-sampled signal on an input port and having a plurality of output ports for outputting a digital signal on each respective one of said plurality of output ports in a one-to-one correspondence with said analog signal on each respective one of said plurality of input ports of said multiplexer, wherein each of said plurality of output ports is operatively connected to said single input port at said first predetermined rate, and
a plurality of second down-samplers, each of said plurality of down-samplers being respectively connected to one of said plurality of output ports of said demultiplexer, said plurality of second down-samplers sampling said digital signal on said respective output port of said demultiplexer at a fifth predetermined rate.

3 more elements

In combination with a multiplexed delta-sigma modulator of the type wherein c analog input signals are received at a plurality of input ports of an input multiplexer, where c is an integer value greater than one, a delta-sigma modulator having an input port connected to an output port of said input multiplexer and operating at a first oversampled rate, a digital filter having an input port connected to said output port of said delta-sigma modulator and operating at a second oversampled rate, an output demultiplexer having an input port connected to said output port of said digital filter and having a plurality of output ports that each output a demultiplexed signal corresponding to one of said c analog input signals, and a plurality of data channel registers respectively connected to said plurality of output ports of said demultiplexer for averaging data at each of said plurality of output ports of said demultiplexer, the improvement which comprises:

a first down-sampler coupled between said output port of said digital filter and said input port of said output demultiplexer, said first down-sampler operating at a first sampling rate corresponding to said first oversampled rate divided by said second oversampled rate divided by c Hz;
and
a plurality of down-samplers respectively coupled between said plurality of output ports of said output demultiplexer and said plurality of data channel registers, said second down-samplers operating at a second sampling rate corresponding to c Hz.

Dependencies are inferred from the claim text.