Current mirror circuits and methods with guaranteed off state and amplifier circuits using same

A method of providing first and second differential control voltages to an amplifier circuit, the method comprising the steps of:

• receiving a control signal;
• providing a first control current substantially proportional to the control signal, the first control current being within a first predetermined range and being offset by a first offset amount when the control signal falls outside the first predetermined range;
• providing a second control current substantially inversely proportional to the control signal, the second control current being within a second predetermined range and being offset by a second offset amount when the second control signal falls outside the second predetermined range;
• generating the first differential control voltage from the difference between the first and second control currents;
• and
• generating the second differential control voltage from the difference between the second and first control currents, the second differential control voltage being substantially similar to the first differential control voltage.

A three-input amplifier circuit for controlling fading between first and second input signals and a control signal, the amplifier comprising:

• a control circuit for providing a first control current that is proportional to the control signal and a second control current, such that the second control current is a function of the first control current;
• a predistortion circuit coupled to the control circuit to provide four control voltages in response to the first and second control currents being output by the control circuit;
• a first input stage for receiving the first input signal;
• a second input stage for receiving the second input signal;
• an output stage for providing an output signal;
• first and second cross-coupled multiplier stages, the first multiplier stage being coupled to the predistortion circuit to receive first and second control voltages, the second multiplier stage being coupled to the predistortion circuit to receive third and fourth control voltages, the multiplier stages also being coupled to the first and second input stage and the output stage, the multiplier stages appropriately steering the first and second input signals to the output stage in response to the control voltages provided by the predistortion circuit.

A two-input amplifier circuit for controlling fading between first and second input signals, the amplifier comprising:

• a control circuit for providing a first and a second control current;
• a predistortion circuit coupled to the control circuit to provide four control voltages in response to the first and second control currents being output by the control circuit;
• a first input stage for receiving the first input signal;
• a second input stage for receiving the second input signal;
• an output stage for providing an output signal;
• first and second cross-coupled multiplier stages, the first multiplier stage being coupled to the predistortion circuit to receive first and second control voltages, the second multiplier stage being coupled to the predistortion circuit to receive third and fourth control voltages, the multiplier stages also being coupled to the first and second input stage, the multiplier stages appropriately steering the first and second input signals to the output stage in response to the control voltages provided by the predistortion circuit, wherein the multiplier stages steer only the first input signal to the output stage when the first control current exceeds the second control current by a predetermined amount.

A two-input amplifier circuit for controlling fading between first and second input signals, the amplifier comprising:

• a control circuit for providing a first and a second control current;
• a predistortion circuit coupled to the control circuit to provide four control voltages in response to the first and second control currents being output by the control circuit;
• a first input stage for receiving the first input signal;
• a second input stage for receiving the second input signal;
• an output stage for providing an output signal;
• first and second cross-coupled multiplier stages, the first multiplier stage being coupled to the predistortion circuit to receive first and second control voltages, the second multiplier stage being coupled to the predistortion circuit to receive third and fourth control voltages, the multiplier stages also being coupled to the first and second input stage, the multiplier stages appropriately steering the first and second input signals to the output stage in response to the control voltages provided by the predistortion circuit, wherein the multiplier stages steer only the second input signal to the output stage when the second control current exceeds the first control current by a predetermined amount.

A two-input amplifier circuit for controlling fading between first and second input signals, the amplifier comprising:

• a control circuit for providing a first and a second control current;
• a predistortion circuit coupled to the control circuit to provide four control voltages in response to the first and second control currents being output by the control circuit;
• a first input stage for receiving the first input signal;
• a second input stage for receiving the second input signal;
• an output stage for providing an output signal;
• first and second cross-coupled multiplier stages, the first multiplier stage being coupled to the predistortion circuit to receive first and second control voltages, the second multiplier stage being coupled to the predistortion circuit to receive third and fourth control voltages, the multiplier stages also being coupled to the first and second input stage, the multiplier stages appropriately steering the first and second input signals to the output stage in response to the control voltages provided by the predistortion circuit, wherein the multiplier stages steer a proportional combination of the first input signal and the second input signal to the output stage when the first control current does not exceed the second control current by a first predetermined amount and the second control current does not exceed the first control current by a second predetermined amount.

A two-input amplifier circuit for controlling fading between first and second input signals, the amplifier comprising:

• a control circuit for providing a first and a second control current, the control circuit including:
• a first current mirror circuit for providing the first control current at a current which is substantially proportional to a control signal when the control signal falls within a first predetermined range, the first control current being offset by a first offset amount from its ideal proportional level when the control signal falls outside the first predetermined range;
• a second current mirror circuit for monitoring a differential signal, equivalent to the amount by which a reference signal exceeds the control signal, and for providing the second control current at a current which is substantially proportional to the differential signal when the differential signal falls within a second predetermined range, the second control current being offset by a second offset amount from its ideal proportional level when the differential signal falls outside the second predetermined range;
• a predistortion circuit coupled to the control circuit to provide four control voltages in response to the first and second control currents being output by the control circuit;
• a first input stage for receiving the first input signal;
• a second input stage for receiving the second input signal;
• an output stage for providing an output signal;
• first and second cross-coupled multiplier stages, the first multiplier stage being coupled to the predistortion circuit to receive first and second control voltages, the second multiplier stage being coupled to the predistortion circuit to receive third and fourth control voltages, the multiplier stages also being coupled to the first and second input stage, the multiplier stages appropriately steering the first and second input signals to the output stage in response to the control voltages provided by the predistortion circuit.

A two-input amplifier circuit for controlling fading between first and second input signals, the amplifier comprising;

• a control circuit for providing a first and a second control current;
• a predistortion circuit coupled to the control circuit to provide four control voltages in response to the first and second control currents being output by the control circuit;
• a first input stage for receiving the first input signal;
• a second input stage for receiving the second input signal;
• an output stage for providing an output signal;
• first and second cross-coupled multiplier stages, the first multiplier stage being coupled to the predistortion circuit to receive first and second control voltages, the second multiplier stage being coupled to the predistortion circuit to receive third and fourth control voltages, the multiplier stages also being coupled to the first and second input stage, the multiplier stages appropriately steering the first and second input signals to the output stage in response to the control voltages provided by the predistortion circuit, wherein the predistortion circuit includes:
• first and second PNP transistors coupled to the first multiplier stage, the PNP transistors having commonly coupled bases, the first PNP transistor providing the first control voltage and the second PNP transistor providing the second control voltage;
• and
• first and second NPN transistors coupled to the second multiplier stage, the first NPN transistor being coupled to the collector of the first PNP transistor for providing the third control voltage, the second NPN transistor being coupled to the second PNP transistor for providing the fourth control voltage.

An amplifier circuit for amplifying at least:

• (1) a first input signal and a first feedback signal;
• and (2) a second input signal and a second feedback signal, the amplifier circuit comprising:
• a first input stage including a first PNP transistor coupled to a first NPN transistor, the first PNP and NPN transistors being driven by the first input signal and for being coupled to receive the first feedback signal, one of the first transistors providing a first driver signal and the other first transistor providing a second driver signal;
• a second input stage including a second PNP transistor coupled to a second NPN transistor, the second PNP and NPN transistors being driven by the second input signal and for being coupled to the second feedback signal, one of the second transistors providing a third driver signal and the other second transistor providing a fourth driver signal;
• a first cross-coupled multiplier circuit comprising:
• first and second current steering transistors being coupled to receive the first driver signal from the first input stage, and
• third and fourth current steering transistors being coupled to receive the third driver signal from the second input stage;
• and
• a second cross-coupled multiplier circuit comprising:
• fifth and sixth current steering transistors being coupled to receive the second driver signal from the first input stage, and
• seventh and eighth current steering transistors being coupled to receive the fourth driver signal from the second input stage;
• and
• an output stage which produces an amplified output signal in response to the four driver signals being received by the multiplier circuits.