LD-MOS transistor

An LD-MOS transistor comprising:

• a source region of a second conductivity type formed on a surface of a silicon semiconductor substrate of a first conductivity type, the polarity of said first and second conductivity types being opposite to each other;
• a drain region of said second conductivity type, forming a channel region between said source region and said drain region;
• and a conductive gate layer overlying via a gate insulation layer on said channel region, and further comprising:
• a body region of said first conductivity type surrounding said source region and having a dopant concentration higher than that of said silicon semiconductor substrate;
• an extended drain region of said second conductivity type, formed in said channel region toward said source region, said extended drain region being in contact with said drain region wherein a portion of the first conductivity type substrate separates the extended drain region from the body region;
• and
• an additional insulation layer formed between said extended drain region and said conductive gate layer, said additional insulation layer being thicker than said conductive gate layer,
• wherein said extended drain region is doped with phosphorus.