Trench method for three dimensional chip connecting during IC fabrication

The method of connecting two-three dimensional integrated circuit chips comprising:

• providing semiconductor device structures in and on the top side of a semiconductor substrate of a first and a second three-dimensional integrated circuit chip wherein said semiconductor device structures include gate electrodes and source and drain regions;
• forming protrusions of a conductive material protruding from the bottom surface of said first integrated circuit chip wherein said bottom surface between said protrusions is covered with a passivation layer covered with polyimide coating, said protrusion formed by:
• etching deep trenches into said first semiconductor substrate,
• depositing an insulating film over the entire surface of said first semiconductor substrate and within said deep trenches,
• selectively etching away said insulating film from the bottom of said trenches,
• depositing a conductive material into said trenches,
• depositing an isolation material over the surface of said insulating film and planarizing said isolation material, and
• removing a portion of said first semiconductor substrate so that said deep trenches form said protrusions;
• covering the top conductive surface of said second integrated circuit chip with a polyimide layer wherein said polyimide layer is deposited over a passivation layer;
• opening connection windows through said polyimide and said passivation layers to said top conductive surface of said second integrated circuit chip wherein said connection windows of said second integrated circuit chip correspond to said protrusions on said first integrated circuit chip;
• and
• aligning said first and second integrated circuit chips wherein said protrusions on said bottom surface of said first integrated circuit chip fit into said connection windows and contact said conductive surface of said second integrated circuit chip and wherein said polyimide layer on said bottom surface of said first integrated circuit contacts said polyimide layer on said top surface of said second integrated circuit.

The method of connecting two three-dimensional integrated circuit chips comprising:

• providing semiconductor device structures in and on the top side of a semiconductor substrate of a first and a second three-dimensional integrated circuit chip wherein said semiconductor device structures include gate electrodes and source and drain regions;
• forming protrusions of a conductive material protruding from the bottom surface of said first integrated circuit chip comprising the steps of:
• etching deep trenches into said first semiconductor substrate;
• depositing an insulating film over the entire surface of said first semiconductor substrate and within said deep trenches;
• selectively etching away said insulating film from the bottom of said trenches;
• depositing a conductive material into said trenches;
• depositing an isolation material over the surface of said insulating film and polishing and planarizing said isolation material;
• and
• grinding, polishing, and selectively etching the bottom side of said first semiconductor substrate wherein said deep trenches form said protrusions from said bottom surface of said first semiconductor substrate;
• covering said bottom surface between said protrusions with a passivation layer covered with a polyimide coating;
• covering the top conductive surface of said second integrated circuit chip with a polyimide layer wherein said polyimide layer is deposited over a passivation layer;
• opening connection windows through said polyimide and said passivation layers to said top conductive surface of said second integrated circuit chip wherein said connection windows of said second integrated circuit chip correspond to said protrusions on said first integrated circuit chip;
• aligning said first and second integrated circuit chips wherein said protrusions on said bottom surface of said first integrated circuit chip fit into said connection windows and contact said conductive surface of said second integrated circuit chip and wherein said polyimide layer on said bottom surface of said first integrated circuit contacts said polyimide layer on said top surface of said second integrated circuit;
• and
• completing said connection between said two three-dimensional integrated circuit chips by thermal compression of about 190 kg/cm.sup.2 and heating said integrated circuit chips to 400.degree. C.