MOS transistor having a composite gate electrode and method of fabrication
AssigneeIntel Corporation
InventorsRobert S. Chau, David B. Fraser, Kenneth C. Cadien, Gopal Raghavan, Leopoldo D. Yau
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Abstract
A novel, reliable, high performance MOS transistor with a composite gate electrode which is compatible with standard CMOS fabrication processes. The composite gate electrode comprises a polysilicon layer formed on a highly conductive layer. The composite gate electrode is formed on a gate insulating layer which is formed on a silicon substrate. A pair of source/drain regions are formed in the substrate and are self-aligned to the outside edges of the composite gate electrode.
Claims4
A lightly doped drain metal oxide semiconductor transistor formed on a substrate of a first conductivity type comprising:
- a gate insulating layer formed on said substrate;
- a composite gate electrode having laterally opposite sidewalls along the width of said composite gate electrode, said composite gate electrode comprising:
- a conductive layer formed on said gate insulating layer wherein said conductive layer is selected from the group consisting of titanium nitride (TIN), polycrystalline carbon, and metallic silicides;
- a polysilicon layer formed on said conductive layer, said polysilicon layer thick enough to mask a subsequent source/drain implant and thick enough to support a silicide reaction;
- a pair of lightly doped drain regions of a first concentration of a second conductivity type formed in said substrate in alignment with said laterally opposite sidewalls of said composite gate electrode;
- a pair of spacers formed adjacent to said laterally opposite sidewalls of said composite gate electrode;
- a pair of source/drain regions of a second concentration of said second conductivity type wherein said second concentration is greater than said first concentration, said source/drain regions formed in said substrate in alignment with the outside edges of said spacers;
- and
- silicide formed on said source/drain regions and on said polysilicon layer.
Dependencies are inferred from the claim text.