Amplifying circuit for simulating a unity gain buffer amplifier

Abstract

An amplifying circuit includes a low gain amplifier having positive and negative inputs and an output. A high impedance path provided by, for example, a low gain unity buffer amplifier feeds from the negative input to the output of the amplifier a first voltage (KV.sup.+) equal to a second voltage (V.sup.+) at the positive input of the amplifier multiplied by the reciprocal of the open loop gain (A.sub.OL) of the amplifier. This circuit simulates a unity gain buffer amplifier having a high input impedance and a high open loop gain using a low open loop gain amplifier and a feed forward arrangement. The use of a low gain amplifier avoids the need for large area transistors and the resultant large parasitic capacitances and so facilitates high speed operation.

Dependencies are inferred from the claim text.