Panel display with dielectric spacer structure
AssigneeFED Corporation
InventorGary W. Jones
Life of this patent
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Abstract
A vertical field emitter structure and field emission device such as a flat panel display utilizing such structure. Self-aligned gate and emitter fabrication is described, together with virtual column field emitter structures, comprising an emitter or gated emitter with conductive columns connecting the emitter to an underlying resistor or conductor structure formed by chemical or other modification of portions of an underlying layer. The display of the invention utilizes field emission structures with low turn-voltages and high accelerating voltages, thereby permitting high brightness, small pixel size, low manufacturing costs, uniform brightness, and high energy efficiency to be achieved.
Claims14
A panel display comprising a phosphor plate having an array of phosphor spots positioned thereon, an electron source plate comprising an array of field emitter devices, each of said field emitter devices comprising an emitter element constructed and arranged to emit a stream of electrons to activate respective ones of said phosphor spots, an individually addressable gate electrode operatively associated with each of said emitter elements and wherein each of said gate electrodes is constructed and arranged to control electron flow from a respective one of said emitter elements and a dielectric spacer frame between said phosphor plate and said electron source plate, wherein the spacer frame is sealed to the phosphor plate and the electron source plate to form an enclosed interior volume evacuatable to form a vacuum therein, and wherein said dielectric spacer frame comprises leaky dielectric surfaces for low secondary electron generating surfaces, to minimize secondary electron emission.
A panel display comprising a phosphor plate, an electron source plate comprising an array of field emitter elements, and a dielectric spacer frame between the phosphor plate and the electron source plate, wherein said dielectric spacer frame comprises leaky dielectric surfaces for low secondary electron generating surfaces, to minimize secondary electron emission and said phosphor plate comprising a multiplicity of phosphor spots, and the array of field emitter elements on the electron source plate defining pixels, wherein the field emitter elements and the phosphor spots are of sufficient relative size to one another that the field emitter pixel size is smaller than phosphor spots, each of said field emitter elements comprising an anode constructed and arranged to emit a stream of electrons to activate respective ones of said phosphor spots, an individually addressable gate electrode operatively associated with each of said emitter elements, whereby the panel display accommodates dispersion of electron beams emitted by the field emitter elements, and electron impact on the dielectric spacer frame is minimized.
A panel display comprising a phosphor plate having an array of phosphor spots thereon, an electron source plate comprising an array of selectively addressable field emitter elements, each of said field emitter elements being constructed and arranged to emit a stream of electrons to activate respective ones of said phosphor spots, a dielectric spacer frame between the phosphor plate and the electron source plate, wherein said dielectric spacer frame comprises leaky dielectric surfaces for low secondary electron generating surfaces, to minimize secondary electron emission, and wherein the phosphor plate comprises alternating stripes of red, green, and blue phosphors with stripes of black matrix material, for enhancement of vacuum gettering and pixel contrast.
Dependencies are inferred from the claim text.