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US 5,615,263 AGranted
Dual purpose security architecture with protected internal operating system
AssigneeVLSI Technology, Inc.
InventorRichard J. Takahashi
Life of this patent
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AssigneeVLSI Technology, Inc.
InventorRichard J. Takahashi
Estimating the term…
A secure mode within a dual mode processor is implemented. In a general/external mode, the dual mode processor executes instructions provided from an external source. The instructions are supplied to the processor via input/output to the processor. Upon receiving a special software or hardware interrupt, the dual mode processor enters a secure/internal mode. The interrupt specifies a secure function stored in a read-only memory within the dual mode processor. Upon receiving such an interrupt, input/output to the dual mode processor is disabled. The identified secure function is executed by the processor. During execution of the secure function, any attempt to insert instructions not originating from the read-only memory are ignored. However, the processor may access data specifically identified by secure function being executed. Upon completion of performance of the secure function, an exit routine is executed to enable input/output to the processor and resume execution of instructions provided via input/output from the source external to the processor.
A computer implemented method for providing a secure mode within a processor, the method comprising the following steps:
A dual mode processor comprising:
A system for performing a cryptographic function on data in a data stream, the system comprising:
Dependencies are inferred from the claim text.