US 5,614,744 AGranted

CMOS-based, low leakage active pixel array with anti-blooming isolation

AssigneeNational Semiconductor Corporation

InventorRichard B. Merrill

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Abstract

An active pixel image sensor in accordance with the present invention utilizes guard rings, protective diffusions, and/or a combination of these two techniques to prevent electrons generated at the periphery of the active area from impacting upon the image sensor array. For example, an n+ guard ring connected to V.sub.cc can be imposed in the p-epi layer between the active area edge and the array, making it difficult for edge-generated electrons to penetrate the p+ epi in the array; this approach requires the use of annular MOS devices in the array. Alternatively, the gates of the n-channel devices in the array can be built to overlap heavily doped p+ bands, forcing current flow between the source/drain regions. As stated above, combinations of these two techniques are also contemplated. Elimination of the active area edge leakage component from the array can increase the dynamic range of the image sensor by 6 bits.

Claims4

Dependent claims

An active pixel image sensor cell comprising:

an isolation region of n-type conductivity formed on semiconductor material of p-type conductivity;
a well region of p-type conductivity formed in the n-type isolation region;
leakage protection means formed in the p-type well region for substantially eliminating current leakage in the cell due to active area edge effects;
a photocollector device that includes a region of n-type conductivity formed in the p-type well region;
a reset transistor that includes first spaced-apart source and drain regions of n-type conductivity formed in the p-type well region to define a first p-type channel region therebetween, and a first conductive gate formed over said first p-type channel region and separated therefrom by dielectric material, said first conductive gate connected to receive a reset signal, and wherein the photocollector region and the first source region being connected to a floating diffusion output node, the first drain region being connected to a positive supply voltage;
a source-follower transistor that includes second spaced-apart source and drain regions of n-type conductivity formed in the p-type well region to define a second p-type channel region therebetween, and a second conductive gate formed over said second channel region and separated therefrom by dielectric material, said second conductive gate being connected to the floating diffusion output node, said second source region being connected to the positive supply voltage;
and
a row select transistor that includes third spaced-apart source and drain regions of n-type conductivity formed in the p-type well region to define a third p-type channel region therebetween and a third conductive floating gate formed over said third channel region and separated therefrom by dielectric material, said third conductive gate being connected to a word line to receive a row select signal applied to said word line, said third drain to region being connected to the second source region of the source-follower transistor, said third source region being connected to a conductive bit line.

5 more elements

An active pixel image sensor cell structure comprising:

a region of p-type conductivity semiconductor material;
a photocollector region of n-type conductivity formed in the p-type region;
a reset transistor that includes a first drain region of n-type conductivity formed in the p-type region and spaced-apart from the n-type photocollector region to define a first intervening section of said p-type region therebetween, and a first annular conductive gate region having a portion thereof formed over the first intervening section of said p-type region and separated therefrom by dielectric material, said first annular conductive gate region being formed to surround said first n-type drain region and connected to a reset line to receive a reset signal;
an annular source-follower transistor that includes a source region of n-type conductivity formed in the p-type region in spaced-apart relationship to the first drain region of the reset transistor, and an intermediate region of n-type conductivity formed in the p-type region in spaced-apart relationship to said source region to define a second intervening section of said p-type region therebetween, and a second annular conductive gate region having a portion thereof formed over the second intervening section of said p-type region and separated therefrom by dielectric material, said second annular conductive gate region being formed to surround said source region, said source region being electrically connected to said first drain region and to a positive supply voltage source;
a row select transistor that includes a third drain region of n-type conductivity formed in the p-type region in spaced-apart relationship to the intermediate n-type region to define a third intervening section of said p-type region therebetween, and a third annular conductive gate having a portion thereof formed over the third intervening section and separated therefrom by dielectric material, said third annular conductive gate being formed to surround said third drain region and connected to a word line to receive a row select signal from said word line, the third drain region being connected to a bit line;
and
an n+ guard ring form in the p-type region to surround the active pixel image sensor cell.

4 more elements

Dependencies are inferred from the claim text.