Method of fabricating an electro-optic integrated circuit having light emitting diodes
AssigneeMotorola, Inc.
InventorsPaige M. Holm, George W. Rhyne, Thomas J. Walczak
Life of this patent
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Abstract
An electro-optic integrated circuit including an addressable array of light emitting devices, a column decoder and a plurality of address lines formed on the substrate. There are n=2{integer[log(m)/log(2)]+1}, where m equals the number of columns, address lines each including an external connection pad. The decoder includes a switching circuit connected to each column for activating the column and a plurality of sets of diodes connected to the address lines and the switching circuits so that each set of diodes has a unique code produced by a combination of diodes in that set and the address lines to which the diodes in that set are connected.
Claims23
A method of fabricating an electro-optic integrated circuit comprising the steps of:
- providing a substrate with a major surface and a plurality of layers of material on the major surface of the substrate, the plurality of layers of material cooperating to form light emitting devices;
- separating portions of the plurality of layers of material into a plurality of light emitting devices positioned in rows and columns;
- providing an electronics area of the substrate adjacent the plurality of light emitting devices;
- and
- forming a plurality of switching transistors and switching diodes in the electronics area and address lines between the electronics area and the columns of light emitting devices, including depositing first and second metallization layers electrically connecting the plurality of light emitting devices in rows and columns and connecting the switching transistors, switching diodes and address lines to the columns of light emitting devices to form a column decoder having fewer address lines than columns of light emitting devices.
A method of fabricating an electro-optic integrated circuit comprising the steps of:
- providing a substrate of non-conductive material with a major surface, a conductive layer of material on the major surface of the substrate, a first carrier confinement layer on the conductive layer, an active layer on the first carrier confinement layer and a second carrier confinement layer on the active layer;
- separating portions of the second carrier confinement layer, the active layer and the first carrier confinement layer into a plurality of light emitting diodes positioned in rows and columns;
- providing an electronics area of the substrate adjacent the plurality of light emitting diodes;
- and
- forming a plurality of switching transistors and switching diodes in the electronics area and address lines between the electronics area and the columns of light emitting diodes, including depositing first and second metallization layers electrically connecting the plurality of light emitting diodes in rows and columns and connecting the switching transistors, switching diodes and address lines to the columns of light emitting diodes to form a column decoder having fewer address lines than columns of light emitting diodes.
A method of fabricating an electro-optic integrated circuit comprising the steps of:
- providing a substrate of non-conductive material with a major surface;
- forming a conductive layer of material on the major surface of the substrate;
- forming a first carrier confinement layer on the conductive layer;
- forming an active layer on the first carrier confinement layer;
- forming a second carrier confinement layer on the active layer;
- selectively etching through the second carrier confinement layer, the active layer, the first carrier confinement layer and into the conductive layer to form a plurality of mesas positioned in rows and columns defining a plurality of light emitting diodes;
- selectively etching through the conductive layer to the substrate to electrically separate the rows of mesas and to form an electronics area on the major surface of the substrate;
- forming a cap of electrically conductive material on the mesas;
- selectively implanting portions of the electronics area to define a plurality of conductive channels;
- selectively depositing a first metallization layer on the conductive layer between mesas to form a first electrode for each of the light emitting diodes and to connect first electrodes of the light emitting diodes in rows, on a selected first group of the plurality of channels to form source and drain electrodes defining a switching transistor in each channel of the selected first group of channels, and on a selected second group of the plurality of channels to form a first electrode defining a switching diode in each channel of the selected second group of channels;
- and
- selectively depositing a second metallization layer on a portion of each of the mesas to form a second electrode for each of the light emitting diodes and to connect second electrodes of the light emitting diodes in columns, on the selected first group of channels to form a gate electrode for each of the switching transistors, and on the selected second group of channels to form a second electrode for each of the switching diodes.
A method of fabricating an electro-optic integrated circuit comprising the steps of:
- providing a substrate of non-conductive material with a major surface;
- forming a first conductive layer of material on the major surface of the substrate;
- forming a second conductive layer on the first conductive layer, the second conductive layer being selectively etchable over the first conductive layer;
- forming a first carrier confinement layer on the second conductive layer;
- forming an active layer on the first carrier confinement layer;
- forming a second carrier confinement layer on the active layer;
- selectively etching through the second carrier confinement layer, the active layer, the first carrier confinement layer and into the second conductive layer to form a plurality of mesas positioned in rows and columns defining a plurality of light emitting diodes;
- selectively etching through the second conductive layer to the first conductive layer to form an electronics area adjacent the plurality of mesas;
- selectively etching through the first conductive layer to the substrate to electrically separate the rows of mesas and to separate the electronic area into a plurality of portions for separate electronic components;
- forming a cap of electrically conductive material on the mesas;
- selectively depositing a first metallization layer on the first conductive layer between mesas to form a first electrode for each of the light emitting diodes and to connect first electrodes of the light emitting diodes in rows, on a selected first group of the plurality of portions of the electronic area to form source and drain electrodes defining a switching transistor, and on a selected second group of the plurality of portions of the electronic area to form a first electrode defining a switching diode;
- and
- selectively depositing a second metallization layer on the cap of each of the mesas to form a second electrode for each of the light emitting diodes and to connect second electrodes of the light emitting diodes in columns, on the selected first group of portions of the electronic area to form a gate electrode for each of the switching transistors, and on the selected second group of portions of the electronic area to form a second electrode for each of the switching diodes.
A method of fabricating an electro-optic integrated circuit comprising the steps of:
- providing a substrate of non-conductive material with a major surface;
- forming a conductive layer of material on the major surface of the substrate;
- forming a first carrier confinement layer on the conductive layer;
- forming an active layer on the first carrier confinement layer;
- forming a second carrier confinement layer on the active layer;
- forming a cap of electrically conductive material on the second carrier confinement layer;
- defining a diode matrix area and an electronics area adjacent thereto on the substrate;
- forming a pinch-off layer of material having a first type of conductivity on the electronics area;
- forming a channel layer of material having an opposite type of conductivity on the pinch-off-layer;
- selectively etching through the channel layer and the pinch-off layer to the cap layer to form a plurality of switching transistor mesas and associated portions of exposed cap layer;
- electrically isolating the plurality of mesas and associated portions of exposed cap layer from each other and from the diode matrix area;
- separating portions of the second carrier confinement layer, the active layer and the first carrier confinement layer in the diode matrix area into a plurality of light emitting diodes positioned in rows and columns;
- selectively depositing a first metallization layer on the conductive layer to form a first electrode for each of the light emitting diodes and to connect first electrodes of the light emitting diodes in rows, on a selected first group of the plurality of mesas to form source and drain electrodes defining a switching transistor in each mesa of the selected first group of mesas, and on one of a mesa and an associated portion of exposed cap layer in each of a selected second group of the plurality of mesas to form a first electrode defining a switching diode in each of the selected second group;
- and
- selectively depositing a second metallization layer to form a second electrode for each of the light emitting diodes and to connect second electrodes of the light emitting diodes in columns, on the selected first group of mesas and on the associated portions of exposed cap layer of the first group of mesas to form a gate electrode and a pinch-off electrode, respectively, for each of the switching transistors, and on the selected second group of mesas to form a second electrode for each of the switching diodes.
Dependencies are inferred from the claim text.