US 5,611,064 A · Virtual memory system

Abstract

In a demand-paged virtual memory system, the pages are arranged in the virtual memory space in groups. In order to translate an address from the virtual address space to a physical memory address space, the virtual group address component is input to a contents addressable memory (767), which outputs a group code (767), and the group code and virtual page address component (768X,Y) are input to a RAM page table (750) which outputs the page address. When the physical memory capacity is substantially smaller than the virtual address space, the CAM provides a large saving in page table size. In the case where the data-elements provide a plural-dimensional representation, for example as in pixel data, the pages include data elements which are contiguous in each of the plural dimensions in order to reduce the amount of page-swapping between the physical memory and a paging memory. The data-elements in the physical memory are accessible in parallel as contiguous patches. In order to allow parallel access of patches which are not aligned with respect to a page and therefore may fall partly on the edge of one page and partly on the edge of a page which is contiguous with the first page in the virtual memory but not in the physical memory, the addressing system determines whether a patch to be accessed has data-elements in different pages, and may then modify the addresses to the physical memory.

Claims20

Dependent claims

A memory system for storing an array of data-elements which form in a virtual memory space contiguous aligned pages of contiguous aligned patches of contiguous data-elements, comprising:

a first memory for storing the data array;
a second memory for storing part of the data array;
means for transferring data-elements page-by-page between the first and second memories such that contiguous pages of the data-elements in the virtual memory address space are not necessarily stored contiguously in the address space of the second memory;
and
means for addressing the second memory to access in parallel a patch of data-elements which is not necessarily such an aligned patch, the addressing means including page edge means for determining whether the patch to be accessed includes data-elements in different pages in the second memory, and means to modify the addresses to the second memory in response to such a determination.

2 more elements

A memory system for storing an array of data-elements which form in a virtual memory space contiguous aligned pages of contiguous aligned patches of contiguous data-elements, comprising:

a first memory for storing the data array;
a second memory for storing part of the data array;
a data-transfer circuit for transferring data-elements page-by-page between the first and second memories;
wherein contiguous pages of the data-elements in the virtual memory address space are not necessarily stored contiguously in the address space of the second memory and
a memory addressing circuit for addressing the second memory to access in parallel a patch of data-elements which is not necessarily such an aligned patch, wherein said memory addressing circuit determines whether the patch to be accessed includes data-elements in different pages in the second memory, and can modify the addresses to the second memory in response to such a determination.

2 more elements

A memory system for storing an array of data-elements which form in a virtual memory space contiguous aligned pages of contiguous data-elements, comprising:

a first memory for storing the data array;
a second memory of smaller capacity than the first memory for storing some of the pages of the data-elements;
and
a memory controller connected to said first and second memories to address locations in said first and second memories and to transfer data-elements between the addressed locations page-by-page;
wherein the data-elements provide a plural-dimensional representation;
wherein said memory controller performs transfers such that the transferred pages include data-elements which are contiguous in each of the plural dimensions;
and wherein said memory controller operates to modify addresses to a non-contiguous data-element to correspond to a contiguous data element in said first memory;
and
wherein the address of a patch to be accessed in the second memory has an aligned page address component an aligned patch address component and a misalignment component indicating a misalignment of the patch to be accessed relative to an aligned patch having an address defined by the aligned page and aligned patch components.

6 more elements

Dependencies are inferred from the claim text.

Virtual memory system

Life of this patent

Virtual memory system

Life of this patent

Abstract

Claims20