US 5,610,954 A · Clock reproduction circuit and elements used in the same

Abstract

A clock reproduction circuit produces a data clock from a data signal. The clock reproduction circuit includes a voltage controlled oscillator, a phase detector, a frequency error detection circuit and a charge pump whose output is controlled by the outputs of the phase detector and the frequency error detection circuit. A VCO clock output from the voltage controlled oscillator is synchronized with the data clock by the feedback loop consisting of these elements. The frequency error detection circuit detects a frequency error between the VCO clock and the data clock by detecting changes in the phases of the VCO clock at the transition edges of the data signal. Analog and digital frequency error detection circuits are used. Further, improved circuit elements in the clock reproduction circuit used.

Claims32

Dependent claims

A clock reproduction circuit for reproducing a data clock from a data signal which is modulated by said data clock, comprising:

a voltage controlled oscillator generating a VCO clock;
a phase detector outputting a phase difference signal relating to a phase difference between said data signal and said VCO clock at each transition edge of said data signal;
a frequency error detection circuit-detecting a frequency difference between said data clock and said VCO clock by detecting and holding phases of said VCO clock at transition edges of said data signal and by detecting changes of said phases of said VCO clock, and outputting a frequency error signal relating to said detected frequency difference;
a charge pump whose output signal is controlled by said phase difference signal and said frequency error signal;
and
a loop filter generating a loop signal by deleting the high frequency components from said output signal of said charge pump and outputs said loop signal to said voltage controlled oscillator.

3 more elements

A frequency error detection circuit for detecting a frequency difference between a clock and a data clock included in a data signal which is modulated by said data clock, comprising:

a phase difference detection circuit which detects a phase of said clock at each transition edge of said data signal so as to provide a clock phase signal representing said detected phase;
and
a phase comparing circuit which compares said detected phase values at two transition edges of said data signal so as to provide a frequency error signal representing a difference, between said detected phases, at said two transition edges.

A charge pump for changing an output voltage at an output terminal according to a first signal group consisting of first increase complementary signals and first decrease complementary signals, and a second signal group consisting of a second increase signal and a second decrease signal, comprising:

a current flow-out circuit including an increase drive voltage generator and an increase pump circuit;
and
a current flow-in circuit including a decrease pump circuit and a decrease drive voltage generator,
wherein said increase drive voltage generator, of which the output terminal is connected to a first node, increases an output voltage according to said second increase signal;
said increase pump circuit is connected between said first node and said output terminal and increases said output voltage at said output terminal according to said first increase complementary signals;
said decrease pump circuit is connected between said output terminal and a second node and decreases said output voltage at said output terminal according to said first decrease complementary signals;
and
said decrease drive voltage generator is connected to said second node and decreases a voltage at said second node according to said second decrease signal.

5 more elements

Dependencies are inferred from the claim text.

Clock reproduction circuit and elements used in the same

Life of this patent

Clock reproduction circuit and elements used in the same

Life of this patent

Abstract

Claims32