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US 5,608,264 AGranted
Surface mountable integrated circuit with conductive vias
AssigneeHarris Corporation
InventorStephen J. Gaul
Life of this patent
Estimating the term…
Abstract
A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. the via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies with vias can be stacked on top of each other or surface mounted to printed circuit boards or other substrate.
Claims18
A surface mountable integrated circuit comprising:
- a wafer of semiconductor material with first and second surfaces and with integrated circuits formed on the first surface of said wafer;
- a via comprising a first end on the first surface of the wafer, an elongated passage bounded by a wall of semiconductor material extending from said first end a controlled depth into the wafer and toward said second surface of said wafer and terminating at the second surface of said wafer;
- a dielectric layer on said wall of semiconductor material;
- and
- a continuous layer of metal on said dielectric layer, said metal forming an elongated body extending from a first end at the first surface of the wafer to a second end at a controlled distance from the second surface of said wafer and said metal comprising a first layer of a barrier metal selected from the group consisting of titanium nitride, copper, lead, platinum, and nickel and a second layer of an adhesion metal deposited on the barrier metal and selected from the group consisting of titanium nitride, chromium, titanium, and titanium tungsten.
2 more elements
A surface mountable integrated circuit comprising:
- a water of semiconductor material with first and second surfaces and with integrated circuits formed on the first surface of said wafer;
- a via comprising a first end on the first surface of the wafer, an elongated passage bounded by a wall of semiconductor material extending from said first end a controlled depth into the wafer and toward said second surface of said wafer and terminating at the second surface of said wafer;
- a dielectric layer on said wall of semiconductor material;
- and
- a continuous layer of conductive material on said dielectric layer, said conductive material forming an elongated body extending from a first end at the first surface of the wafer to a second end at a controlled distance from the second surface of said wafer wherein the layer of conductive material fills the via and extends a controlled distance beneath the second surface of the wafer.
2 more elements
A surface mountable integrated circuit comprising:
- a water of semiconductor material with first and second surfaces and with integrated circuits formed on the first surface of said wafer;
- a via comprising a first end on the first surface of the wafer, an elongated passage bounded by a wall of semiconductor material extending from said first end a controlled depth into the wafer and toward said second surface of said wafer and terminating at the second surface of said wafer;
- a dielectric layer on said wall of semiconductor material;
- and
- a continuous layer of conductive material on said dielectric layer, said conductive material forming an elongated body extending from a first end at the first surface of the wafer to a second end at a controlled distance from the second surface of said wafer, wherein the layer of conductive material comprises doped polysilicon and the polysilicon fills the via.
2 more elements
A surface mountable integrated circuit comprising:
- a wafer of semiconductor material with first and second surfaces and with integrated circuits formed on the first surface of said wafer;
- a via comprising a first end on the first surface of the wafer, an elongated passage bounded by a wall of semiconductor material extending from said first end a controlled depth into the wafer and toward said second surface of said wafer and terminating at the second surface of said wafer;
- a dielectric layer on said wall of semiconductor material;
- and
- a continuous layer of conductive material on said dielectric layer, said conductive material forming an elongated body extending from a first end at the first surface of the wafer to a second end at a controlled distance from the second surface of said wafer, wherein the wall of semiconductor material has a substantially uniform crossection between the two ends of the via passage.
2 more elements
Dependencies are inferred from the claim text.