FET optical receiver using backside illumination, indium materials species
AssigneeThe United States of America as represented by the Secretary of the Air Force
InventorsEric A. Martin, Kenneth Vaccaro, William Waters, Joseph P. Lorenzo, Stephen Spaziani
Life of this patent
Estimating the term…
Abstract
A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.
Claims9
An optical signal to electrical signal transducing field effect transistor, comprising:
- an electrically insulating supporting substrate member;
- a mesa configured semiconductor layer of indium and being capable of responding to optical energy having a face portion received on said supporting substrate member and having an opposing outward facing optical energy reception surface;
- a first electrical conductor member received intermediate said substrate member and said face portion in ohmic contact with said face portion and formed on a field effect transistor buried source region in said mesa configured semiconductor layer;
- a second electrical conductor member received intermediate said substrate member and said face portion in ohmic contact with said face portion and formed on a field effect transistor buried drain region in said mesa configured semiconductor layer;
- a third electrical conductor member received intermediate said substrate member and said face portion, laterally between said first and second electrical conductor members, and in electrically insulated contact with said face portion and formed on a field effect transistor buried Shottky gate region in said mesa configured semiconductor layer;
- and
- a layer of optical energy reflection diminishing, substantially chemically inert, passivation material received over said outward facing optical energy reception surface of said mesa configured semiconductor layer.
A period table Group III-V photo field effect transistor formed by the process of:
- growing on an indium phosphide first substrate member an indium phosphide lattice-matched epitaxial layer having a composition taken from the materials group consisting of indium gallium arsenide and indium aluminum arsenide;
- etching said epitaxial layer into a plurality of laterally disposed mesas of predetermined physical size and shape, said mesas having a top surface and sloping side surfaces extending from said top surface down to said first substrate member;
- depositing source and drain metal contacts on said top surface and sloping side surfaces of each mesa;
- etching a gate recess into said top surface of each mesa intermediate said source and drain metal contacts;
- forming a metallic electrically insulated Shottky gate member in said gate recess;
- covering said top surface, said Shottky gate member and said source and drain metal contacts with a first inert material passivation layer;
- filling void areas between the laterally disposed mesas with an adhesive filling material to a thickness sufficient to cover said first inert material passivation layer on said top surface of the mesas;
- and
- attaching a second substrate member to said first inert material passivation layer with said adhesive filling material;
- removing said first substrate member to expose an outward facing optical energy reception surface of said indium phosphide lattice-matched epitaxial layer;
- and
- overlaying said exposed outward facing optical energy reception surface with a second layer of inert passivation material.
Dependencies are inferred from the claim text.