Method and circuit for detecting a fault in a clock signal for microprocessor electronic devices including memory elements
AssigneeSGS-Microelectronics S.A.
InventorsAngelo Moroni, Flavio Scarra', Alberto Taddeo
Life of this patent
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Abstract
An electronic device including a microprocessor, a circuit generating a clock signal, and memories of both the volatile type and the non-volatile type, incorporates a circuit for generation of a reset signal capable of detecting a stop in the oscillation of said clock signal and generating a logic signal coupled with the reset input of the microprocessor. The circuit monitors the clock signal applied to the device and, if an irregularity is detected, generate a reset signal holding the microprocessor in a safe state. The reset signal is held until the circuit generating the clock signal resumes normal operation.
Claims11
A non-volatile electrically programmable and erasable memory device including a memory cell matrix and a microprocessor interlocked with a circuit generating at least one oscillating periodic clock signal, comprising:
- a circuit for generation of a reset signal for said microprocessor having an input terminal coupled with an output of the circuit generating at least one oscillating clock signal and an output terminal coupled with a reset input of the microprocessor;
- wherein said circuit for generation of a reset signal detects a stop in the oscillation of said clock signal.
Dependencies are inferred from the claim text.