Differential to single-ended CMOS converter
AssigneeApple Computer, Inc.
InventorRoger Van Brunt
Life of this patent
Estimating the term…
Abstract
A differential-to-CMOS level signal converter which receives a first differential signal having a small amplitude difference between the binary signals. The differential-to-CMOS level converter amplifies and level shifts the binary differential signal and outputs a single-ended CMOS level signal suitable for use by digital CMOS logic. A circuit for biasing the differential-to-CMOS level converter is coupled to the level shifting circuitry.
Claims19
An apparatus for converting a small amplitude differential signal to a single-ended signal suitable for use in CMOS logic circuits, said apparatus comprising:
- a first cross-coupled level shifting circuit for receiving said differential signal and for outputting a shifted signal, said first cross-coupled level shifting circuit including a cross-coupled feedback loop having a loop gain of less than one;
- a first amplification circuit for amplifying said shifted signal to a level suitable for use in CMOS logic circuits;
- and
- a biasing circuit coupled to said first cross-coupled level shifting circuit for biasing said first cross-coupled level shifting circuit and said first amplification circuit, wherein said apparatus is implemented in a CMOS digital logic process.
A signal converter for converting a small amplitude differential signal into a single-ended signal suitable for use by complimentary metal-oxide-semiconductor (CMOS) circuits, said differential signal comprising first and second signal components, said signal converter comprising:
- a CMOS digital logic transistor arrangement including a cross-coupled pair of transistors that form a cross-coupled feedback loop, the transistor arrangement for receiving said differential signal and level shifting said signal with gain, said cross-coupled feedback loop having a loop gain that is less than one;
- an inverting amplifier coupled to said transistor arrangement for receiving an output signal from said transistor arrangement and providing additional gain to said signal to bring it to CMOS signal levels;
- and
- a closed-loop biasing circuit coupled to said transistor arrangement for biasing said signal converter.
A method of converting a small amplitude differential signal to a single-ended signal suitable for use by CMOS logic circuits, said method comprising the steps of:
- level shifting said differential signal from a first level to a second level with a cross-coupled level shifting circuit implemented in a CMOS digital logic process while providing gain to said signal, said cross-coupled level shifting circuit including a cross-coupled feedback loop having a loop gain of less than one;
- amplifying the signal once it has been level shifted with gain to CMOS logic circuit levels;
- and
- biasing the level shifting and amplifying circuitry to ensure that signal level transitions are properly detected.
Dependencies are inferred from the claim text.