Cascode operational amplifier with multiple input stage

A cascode operational amplifier comprising:

• a differential input block which receives a differential input having a first differential input stage and a second differential input stage;
• a cascode block coupled to the differential input block which provides a differential output for the operational amplifier;
• a common mode feedback block coupled to the second differential input stage of the differential input block and the differential output of the cascode block which stabilize a direct current (DC) output level for the differential output;
• a load block coupled to the differential output of the cascode block which applies a resistive load to the differential output in response to a differential input signal applied to the differential input block;
• and
• the load block includes a third differential input stage coupled to the first differential input stage and the second differential input stage which receives the differential input.

A cascode operational amplifier comprising:

• a differential input block which receives a differential input having a first differential input stage and a second differential input stage;
• a cascode block coupled to the differential input block which provides a differential output for the operational amplifier;
• a common mode feedback block coupled to the second differential input stage of the differential input block and the differential output of the cascode block which stabilizes a direct current (DC) output level for the differential output;
• and
• a load block coupled to the differential output of the cascode block which applies a resistive load to the differential output in response to a differential input signal applied to the differential input block, the load block includes a third differential input stage coupled to the first differential input stage and the second differential input stage which receives the differential input,
• the third differential input stage includes a third current source which regulates current through the third differential input stage.

A multiple input stage cascode operational amplifier comprising:

• a first differential input stage having a first amplifier input and a second amplifier input, a first differential stage first input coupled to a first input node and a first differential stage second input coupled to a second input node, and a first differential stage output;
• a first differential input stage bias voltage circuit coupled to the first differential stage output and a lowest potential reference having a first bias voltage control input which controls input current through the first differential input stage in response to a first bias voltage control signal;
• a second differential input stage having a third amplifier input coupled
• to the first amplifier input and a fourth amplifier input coupled to the second amplifier input, a second differential stage input, and a second differential stage first output coupled to the first input node and a second differential stage second output coupled to the second input node which provides input current to the first differential stage first input and the first differential stage second input in response to a differential input signal applied to the third amplifier input and the fourth amplifier input;
• a second differential input stage bias voltage circuit having a second bias voltage circuit input, a second bias voltage circuit output coupled to the second differential stage input, and a second bias voltage control input which controls current through the second differential input stage in response to a second bias voltage control signal;
• a common mode feedback block having a common mode input coupled to a power source, a common mode output coupled to the second bias voltage circuit input, and a first feedback input coupled to a first output node and a second feedback input coupled to a second output node which stabilizes an output level of the operational amplifier;
• a cascode block having a first cascode input coupled to the first input node and a second cascode input coupled to the second input node, and a first cascode output coupled to the first output node and a second cascode output coupled to the second output node which provides output current to the first output node and the second output node;
• and
• a first load block having a first load input coupled to the first output node and a second load input coupled to the second output node, and a first load output and a second load output coupled to a lowest potential reference which provides a resistive load to the first output node and the second output node in response to the output current from the cascode block.

A folded-cascode CMOS operational amplifier comprising:

• a first differential input stage including a first n-channel device and a second n-channel device having a source of the first n-channel device coupled to a source of the second n-channel device to provide a first differential stage output, a drain of the first n-channel device to receive a first differential stage first input and a drain of the second n-channel device to receive a first differential stage second input, a gate of the first n-channel device to receive a first amplifier input and a gate of the second n-channel device to receive a second amplifier input;
• a first differential input stage bias voltage circuit including a n-channel device having a drain coupled to the first differential stage output, a source coupled to a lowest potential reference, and a gate coupled to a first bias voltage control input which controls input current through the first differential input stage in response to a first bias voltage control signal;
• a second differential input stage including a first p-channel device and a second p-channel device having a source of the first p-channel device coupled to a source of the second p-channel device to receive a second differential stage input, a drain of the first p-channel device coupled to the first differential stage first input and a drain of the second p-channel device coupled to the first differential stage second input, and a gate of the first p-channel device to receive the first amplifier input and a gate of the second p-channel device to receive the second amplifier input which provides the input current to the first differential stage first input and the first differential stage second input in response to a differential input signal;
• a second differential input stage bias voltage circuit including a p-channel device having a drain coupled to the second differential stage input, a source coupled to a second bias voltage circuit input, and a gate coupled to a second bias voltage control input which controls output current through the second differential input stage in response to a second bias voltage control signal;
• a common mode feedback block including a first p-channel device and a second p-channel device having a source of the first p-channel device and a source of the second p-channel device coupled to a power source, a drain of the first p-channel device and a drain of the second p-channel device coupled to the second bias voltage circuit input, and a gate of the first p-channel device coupled to a first operational amplifier output and a gate of the second p-channel device coupled to a second operational amplifier output;
• a cascode block including a first p-channel device and a second p-channel device having a source of the first p-channel device coupled to the drain of the first p-channel device of the second differential input stage and a source of the second p-channel device coupled to the drain of the second p-channel device of the second differential input stage, a drain of the first p-channel device to provide the first operational amplifier output and a drain of the second p-channel device to provide the second operational amplifier output, and a gate of the first p-channel device coupled to a gate of the second p-channel device to receive a cascode bias voltage input so that the cascode block provides the first operational amplifier output and the second operational amplifier output in response to the output current from the second differential stage;
• and
• a load block including a first n-channel device and a second n-channel device having a drain of the first n-channel device coupled to the first operational amplifier output and a drain of the second n-channel device coupled to the second operational amplifier output, a source of the first n-channel device and a source of the second n-channel device coupled to a lowest potential reference, and a gate of the first n-channel device coupled to a gate of the second n-channel device to receive a load bias voltage control input so that the load block provides a resistive load in response to the output current from the first operational amplifier output and the second operational amplifier output.