Register protection structure for FPGA
AssigneeXilinx, Inc.
InventorsThomas A. Kean, William A. Wilkie
Life of this patent
Estimating the term…
Abstract
In an FPGA having registers which are part of a user's logic functions and a configuration memory which is read and written through an addressing structure, a register protect circuit controllably protects the contects of these user logic registers from being modified by signals from the user's logic, allows these registers to be written by a microprocessor through the configuration memory addressing structure, and allows both the user's registers and lines which provide combinational signals to be read by a microprocessor through the configuration memory addressing structure.
Claims4
A register protect structure comprising:
- a register having a data input terminal for receiving an input signal D, a register output terminal for providing a register output signal Q, and a clock input terminal;
- means for generating a user logic signal;
- means for accessing said register input terminal and register output terminal through configuration memory accessing lines;
- means for selecting said input signal D from any one of said user logic signal, said configuration memory accessing lines, and said register output signal Q;
- and
- register protect means for preventing said user logic signal from being selected by said means for selecting.
A register protect structure comprising:
- a register having a data input terminal for receiving an input signal D, a register output terminal for providing a register output signal O, a clock input terminal, and a clear input terminal for clearing said output signal O in response to a clear signal;
- means for generating a user logic signal;
- means for accessing said register input terminal and register output terminal through configuration memory accessing lines;
- means for selecting said input signal D from any of said user logic signal, said configuration memory access lines, and said register output signal O;
- and
- register protect means for preventing said user logic signal from being selected by said means for selecting;
- means for preventing said clear signal from being massed to said clear in terminal, said means for preventing said clear signal from being passed to said clear input terminal comprising a logic gate which receives both said clear signal and a signal from said register protect means and passes said clear signal to said clear input terminal only when said signal from said register protect means is not asserted.
Dependencies are inferred from the claim text.