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AssigneeInternational Business Machines Corporation
InventorsJames M. Leas, Robert W. Koss, George F. Walker, Charles H. Perry, Jody J. Van Horn
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An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.
An apparatus for simultaneously contacting a plurality of integrated circuit product chips having signal I/O, ground, and power pads, the product chips on a product wafer having a front surface and a back surface, the apparatus connectable to a power supply, the apparatus comprising:
A method for testing or burning-in substantially all of the integrated circuit product chips on a product wafer, the product chips having signal I/O, ground, and power pads, the method comprising the steps of:
Dependencies are inferred from the claim text.