High-density read-only memory
AssigneeLucent Technologies Inc.
InventorMasakazu Shoji
Life of this patent
Estimating the term…
Abstract
A system and method for the storage of digital information wherein data that would normally be represented by multiple bits of information is effectively stored at single memory site within a ROM. This is accomplished by employing a multiple bit-line memory architecture, in conjunction with a data decoder. With this arrangement it is possible to store, at a single memory site, information that would have required up to .left brkt-top.log.sub.2 (n(n-1)/2)+1).right brkt-top. individual memory sites in a conventional ROM (where n is the number independent of bit-lines connected to an individual memory element in the invention). The invention is particularly well-suited to what would be considered relatively low-speed data retrieval systems, such as those adapted to provide audio and/or video to a user on a real time basis.
Claims10
A read-only memory device comprising:
- an array of individual memory sites including at least one switchable memory element at each of said sites;
- a plurality of bitlines, each capable of being grounded via a connection through each of said switchable memory elements in a particular row of said memory site array;
- and
- a decoding circuit connected to said plurality of bitlines, adapted to provide an output indicative of a particular one of said plurality of bitlines being grounded via a specific one of said switchable memory elements in said particular row of said memory site array.
A method for retrieving digital data comprising the steps of:
- accessing a plurality of bitlines associated with a single memory site;
- determining which, if any, of said plurality of bitlines are connected to ground at said memory site;
- and
- producing a signal as a function of said determination, wherein said signal represents a particular data state associated with a multiple bit data sequence.
A method for retrieving digital data comprising the steps of:
- accessing a plurality of n bitlines associated with a single memory site;
- determining which, if any, of said plurality of bitlines are interconnected at said memory site;
- and
- producing a signal as a function of said determination, wherein said signal is representative of one of (n(n-1)/2)+1 data states.
Dependencies are inferred from the claim text.