US 5,596,515 AGranted

Microprocessor control circuit with inverted reset and extendable runtime

AssigneeJohnson Service Company

InventorJ. Scott Jamieson

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Abstract

A microprocessor-based burner control apparatus for use in preventing incorrect ignition signals. An inverting circuit inverts and limits the magnitude of a periodic input supply voltage to create an activating signal. This activating signal is applied to the reset terminal of the microprocessor, which enters an active state during the logic high level of the activating signal and enters an inactive state during the logic low level of the activating signal. The processor is connected to the output circuits, which can only be operated during the positive half-cycle of the input supply voltage. During initial operation of the system, the microprocessor is only active during the negative half-cycle, at which time the outputs cannot be activated. The microprocessor then performs a series of tests on the system, and if all the tests are passed, the microprocessor generates an output signal. This output signal is applied to the reset terminal of the microprocessor, where it combines with the activating signal to form an override signal. The override signal allows the microprocessor to extend its active state into the positive half-cycle and operate the output circuits. The extended active state of the microprocessor also allows for better control of the output circuits due to the increase in processing time during each cycle of the input supply voltage.

An apparatus for increasing control over the outputs of a gas burner ignition control system having a periodic input power supply signal to prevent incorrect ignition signals, comprising:

processing means for processing information and executing an operating program,
said processing means having a reset terminal for receiving an activating signal and an output terminal,
wherein said output terminal is connected to said reset terminal;
said output terminal supplying an output signal which combines with said activating signal to form an override signal at said reset terminal,
said override signal having first and second levels;
and
inverting means for supplying said activating signal,
said inverting means receiving the periodic input supply signal and inverting the supply signal to generate said activating signal;
said inverting means connected to said reset terminal to supply said activating signal to said reset terminal,
said activating signal having succeeding and repetitive first and second signal levels 180.degree. out of phase from the input supply signal,
said activating signal being a square wave limited in magnitude to a logic high and a logic low;
wherein said processing means is responsive to said activating signal to enter an active state when said activating signal is at the first level, and
said processing means enters an inactive state when said activating signal is at the second level;
and
said processing means remains in the active state to extend the processing time when said override signal is at the first level and said activating signal is at the second level;
and
said processing means remains in the active state to extend the processing time only after said processing means has successfully completed a series of tests;
and
said processing means connected to the output circuits, the output circuits being operational only during the time said processing means remains active due to said override signal being at the first level and said activating signal being at the second level.

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Abstract

Claims9