US 5,594,883 AGranted

Hierarchical data storage system employing contemporaneous transfer of designated data pages to long write and short read cycle memory

AssigneeInternational Business Machines Corporation

InventorWilbur D. Pricer

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Abstract

A method and system control approach for contemporaneous transfer of designated replacement pages from a main store to an associated memory having a write cycle 10.times. longer than a read cycle thereof (e.g. nonvolatile semiconductor memory). Each designated data page includes an associated home address within the nonvolatile semiconductor memory. The approach includes designating at least two data pages of the main store for transfer to the nonvolatile semiconductor memory; and upon occurrence of a predetermined condition, contemporaneously transferring the designated data pages from the main store to the nonvolatile semiconductor memory for writing into the nonvolatile semiconductor memory at their associated addresses. Preferably, the designated data pages are simultaneously written in the nonvolatile semiconductor memory subsequent to a simultaneous erase of their associated home addresses.

Claims25

Dependent claims

In a data processing system having a first storage means, a long write cycle/short read cycle storage means, and a data bus coupled between said first storage means and said long write cycle/short read cycle storage means, said long write cycle/short read cycle storage means being operable in a read cycle and a write cycle, said write cycle being substantially longer than said read cycle, a control method for transfer of data pages from said first storage means to said long write cycle/short read cycle storage means, comprising the steps of:

(a) designating a first data page stored in said first storage means to be written to a home address in said long write cycle/short read cycle storage means;
(b) designating at least one additional data page stored in said first storage means to be written to home addresses said long write cycle/short read cycle storage means, each home address of each data page of said at least one additional data page being unique with respect to the home addresses of all previously designated data pages such that the writing of all designated data pages to said long write cycle/short read cycle storage means may be accomplished simultaneously;
and
(c) upon occurrence of a time independent predetermined condition, contemporaneously transferring said first data page and said at least one additional data page from said first storage means to said long write cycle/short read cycle storage means via said data bus, and simultaneously writing said first data page and said at least one additional data pages into said long write cycle/short read cycle storage means at said home addresses.

1 more element

A data processing system comprising:

a central processor;
a main store coupled to said central processor for holding data pages to be processed;
a nonvolatile semiconductor memory for holding data pages at predefined addresses, said nonvolatile semiconductor memory having a write cycle that is at least an order of magnitude longer than a read cycle;
a data bus coupled between said main store and said nonvolatile semiconductor memory;
and
means for controlling transfer of data pages from said main store to said nonvolatile semiconductor memory, said transfer control means including
means for designating at least two data pages in said main store for contemporaneous transfer to said nonvolatile semiconductor memory,
means for determining whether a designated data page may be written to said nonvolatile semiconductor memory simultaneously with all previously designated data pages of said at least two designated data pages.
means for contemporaneously transferring upon occurrence of a time independent predetermined condition said at least two designated data pages from said main store to said nonvolatile semiconductor memory via said data bus for writing into said nonvolatile semiconductor memory, and
means for simultaneously writing said at least two designated data pages into said nonvolatile semiconductor memory.

7 more elements

Dependencies are inferred from the claim text.