Enhanced peak detector
AssigneeGnuco Technology Corporation
InventorsGary T. Carroll, J. Donald Pauley
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AssigneeGnuco Technology Corporation
InventorsGary T. Carroll, J. Donald Pauley
Estimating the term…
An enhanced peak detector circuit for the amplitude demodulation of an incoming amplitude modulated signal is provided. In its simplest form, the enhanced peak detector circuit includes a forward biased NPN transistor, a peak detecting segment coupled to the base-emitter junction of the transistor; and a peak holding capacitor leading from the collector of the transistor and connected in parallel to the peak detecting segment. The peak detecting segment includes a parallel connected peak detecting capacitor and a resistor. When the base-emitter junction of the transistor is conducting, both the peak detecting capacitor and the peak holding capacitor are charging. Conversely, when the base-emitter junction of the transistor is back biased, the peak detecting capacitor discharges through the resistor and the collector remains open such that the peak holding capacitor remains charged.
A peak detector circuit for amplitude demodulation of an incoming signal, the peak detector circuit comprises:
A peak detector circuit for amplitude demodulation of a high peak-to-peak voltage incoming carrier signal, the peak detector circuit consisting essentially of:
Dependencies are inferred from the claim text.