Programmable logic device with regional and universal signal routing

A programmable logic device (PLD), comprising

• a plurality of logic cells receiving input signals through logic cell inputs, said logic cells arranged in groups defining separate logic regions of such cells,
• a plurality of bus lines for conducting signals thereon, and
• a crosspoint switch matrix programmably connecting bus lines to said logic cell inputs, each logic cell input being programmably connectable via a set of crosspoint switches of said matrix to any one of a plurality of said bus lines but capable of being usefully connected without shorting to at most one of said bus lines, each crosspoint switch including a transmission gate connected from one of said bus lines to one of said logic cell inputs, said transmission gate being controlled by a programmable nonvolatile latch, each bus line being connectable to the logic cell inputs to the logic cells of at least one of said logic regions, at least one bus line being a regional bus line connectable only to logic cell inputs of the logic cells in only one of said logic regions and at least one bus line being a multi-regional bus line connectable to logic cell inputs of logic cells in multiple logic regions, each logic cell providing a regional feedback signal to a regional bus line.

A programmable logic device (PLD), comprising

• a plurality of logic cells receiving input signals through logic cell inputs, said logic cells arranged in groups defining separate logic regions of such cells,
• a plurality of bus lines for conducting signals thereon, and
• a crosspoint switch matrix programmably connecting bus lines to said logic cell inputs, each logic cell input being programmably connectable via a set of crosspoint switches of said matrix to any one of a plurality of said bus lines but capable of being usefully connected without shorting to at most one of said bus lines, each crosspoint switch including a transmission gate connected from one of said bus lines to one of said logic cell inputs, said transmission gate being controlled by a programmable nonvolatile latch, each bus line being connectable to the logic cell inputs to the logic cells of at least one of said logic regions, at least one bus line being a regional bus line connectable only to logic cell inputs of the logic cells in only one of said logic regions and at least one bus line being a multi-regional bus line connectable to logic cell inputs of logic cells in multiple logic regions, each logic cell providing a multi-regional feedback signal to a multi-regional bus line.