Sealed cavity arrangement method

A method for providing a sealed cavity means coactively with the surface of a silicon wafer forming a substrate and with electrically insulated conductor means across a sealing area formed between a lid means defining part of said cavity means and said wafer surface to connect functional device means inside said cavity means to electrical terminals outside said cavity means, comprising:

• a) providing an N type single silicon crystal substrate,
• b) carrying out a photomask step in which buried conductors are formed by ion to implantation of boron, using a photoresist on top of said substrate as a mask layer, followed by a drive-in diffusion step, in order to provide surface doping of insulated P-type areas for said conductors and without any steps in the substrate surface at the location of PN junctions thus provided,
• c) growing an epitaxial N type layer on top of said buried conductors and said top of said substrate adjacent said conductors to provide for said conductors being buried into single crystal silicon to be protected from surface effects,
• d) forming P type contacts extending from the top level of said epitaxial layer down to each end of said buffed P type conductors by a photomasking and doping step,
• e) providing a passivation layer on top of said epitaxial layer and and said contacts,
• f) providing said functional device means and electrically connecting said functional device means to said contacts,
• g) providing said lid means over said functional device means and part of said wafer surface, thereby positioning at least part of a rim of said lid means to lie above said buried conductors,
• h) positioning said silicon wafer substrate and said lid means in a mutually aligned state on heating means,
• i) applying an electric field between said wafer substrate and said lid means,
• j) heating the combined wafer substrate and lid means structure to an elevated temperature to cause positive ions in said lid means to be mobile and drift under the influence of said electric field towards interface at said wafer substrate to create an electrostatic force which pulls said wafer substrate and said lid means together to atomic level intimate contact, and
• k) cooling said combined structure to immobilize said ions to maintain at least part of said electrostatic force and bond said wafer substrate and said lid means together, and removing said applied electric field.