Semiconductor integrated circuit device having improvement arrangement of pads
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKenichi Yasuda, Kiyohiro Furutani, Hiroshi Miyamoto
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKenichi Yasuda, Kiyohiro Furutani, Hiroshi Miyamoto
Estimating the term…
A DRAM includes a package, a semiconductor chip housed in the package, and a plurality of leads each disposed from the outside of the package over the periphery of the semiconductor chip. The power supply potential is applied to some of the leads. Corresponding to one power supply lead, one power supply pad and one selection pad are formed. Corresponding to another power supply lead, another power supply pad and another selection pad are formed. Each of these two selection pads is connected or not connected to the corresponding power supply lead by bonding. As a result, one of four word configurations is selected. Since these two selection pads are disposed in the vicinity of the corresponding power supply leads, respectively, the number of times of bonding to one power supply lead is reduced.
A semiconductor integrated circuit device, comprising:
The semiconductor integrated circuit device, comprising:
A semiconductor integrated circuit device for use as a normal bend product and a reverse bend product, comprising:
Dependencies are inferred from the claim text.