Computer system with distributed bus arbitration scheme for symmetric and priority agents

A method of arbitrating for ownership of a bus among a plurality of stand-alone agents which include one or more symmetric agent(s) and at least one priority agent in a computer system, said symmetric agent(s) having a predetermined circular ordering, the method comprising the steps of:

• issuing an arbitration event by said symmetric agent(s);
• responsive to said arbitration event, determining in each symmetric agent, a symmetric owner from among said symmetric agent(s), each of said symmetric agent(s) performing the steps of:
• reading a rotating ID value stored in each of said symmetric agents to determine a lowest priority symmetric agent in said circular ordering;
• detecting which of said symmetric agents are requesting ownership of said bus;
• from among said symmetric agent(s) requesting ownership of said bus, selecting a highest priority symmetric agent to be said symmetric owner;
• updating said rotating ID value to indicate said symmetric owner;
• and
• granting ownership of said bus to said symmetric owner.

A multiprocessor (MP) computer system comprising:

• a main memory;
• a plurality of processors;
• a first bus coupled to the plurality of processors and to the main memory providing information transfer therebetween;
• a priority agent coupled to the first bus, the priority agent including an arbiter unit that arbitrates for ownership of the first bus;
• wherein each processor includes a symmetric arbitration unit controlling processor access to the first bus, each processor asserting an address strobe signal when performing a transaction on the first bus, and asserting a lock signal to block other processors or the priority agent from acquiring the first bus;
• the arbiter unit asserting a priority signal to request ownership from a processor having current ownership of the first bus, the processor relinquishing ownership within a determined number of clock cycles after the assertion of the priority signal unless the lock signal has been asserted by the processor, the arbiter unit releasing ownership of the first bus to the processors by deasserting the priority signal.

In a multiprocessor (MP) computer system comprising a plurality of symmetric processors each including an arbitration unit for controlling access to a bus, and a priority agent coupled to the bus, a method of arbitrating for ownership of the bus from a symmetric processor having current ownership of the bus, the method comprising the steps of:

• (a) asserting by the priority agent a priority request signal during a first clock cycle;
• (b) determining that a lock signal has not been asserted by the arbitration unit of the symmetric processor;
• (c) determining within a certain time period of the first clock cycle whether a transaction is occurring on the bus;
• if so
• (d) waiting until the transaction completes;
• else,
• (e) waiting a predetermined number of clock cycles;
• (f) obtaining ownership of the bus by the priority agent.

A computer system comprising:

• a main memory;
• a plurality of stand-alone agents which includes symmetric agents and a priority agent, at least one of the symmetric agents being a processor;
• a first bus coupled to the symmetric agents and to the main memory providing information transfer therebetween;
• a priority agent coupled to the first bus, the priority agent including an arbiter unit that arbitrates for ownership of the first bus;
• wherein each of the symmetric agents includes an arbitration unit controlling agent access to the first bus, a symmetric agent asserting an address strobe signal when performing a transaction on the first bus, and asserting a lock signal to block other symmetric agents or the priority agent from acquiring the first bus;
• the arbiter unit asserting a priority signal to request ownership of the first bus from a symmetric agent having current ownership of the first bus, the symmetric agent relinquishing ownership within a determined number of clock cycles after the assertion of the priority signal unless the lock signal has been asserted by the symmetric agent, the arbiter unit releasing ownership of the first bus back to the symmetric agents by deasserting the priority signal.

In a computer system comprising a plurality of stand-alone agents coupled to a bus, the stand-alone agents including symmetric agents and a priority agent, each of the symmetric agents including an arbitration unit for controlling access to the bus, wherein at least one of the symmetric agents is a processor, a method for arbitrating ownership of the bus from a symmetric agent having current ownership of the bus comprising the steps of:

• (a) asserting by the priority agent a priority request signal during a first clock cycle;
• (b) determining that the arbitration unit of the symmetric agent has not asserted a lock signal;
• (c) determining within a certain time period of the first clock cycle whether a transaction is occurring on the bus;
• if so
• (d) waiting until the transaction completes;
• else,
• (e) waiting a predetermined number of clock cycles;
• (f) obtaining ownership of the bus by the priority agent.

A computer system with distributed bus arbitration comprising:

• a bus;
• a plurality of stand-alone agents coupled to said bus, said stand-alone agents including symmetric agents and a priority agent;
• each of said symmetric agents having logic circuitry that sends a symmetric request signal on said bus to request ownership of said bus and which receives symmetric request signals from other symmetric agents and which also receives a priority request signal from said priority agent, said symmetric owner of said bus being determined by said logic circuitry as among said symmetric agents according to an algorithm;
• wherein said logic circuitry of said symmetric owner releases ownership of said bus when said priority request signal is received.