Computer system and method using functional memory

A computer system comprising:

• a central processing unit, including memory access circuitry for asserting memory addresses and for writing and reading data to and from memory devices at asserted memory addresses;
• a functional memory coupled to the central processing unit's memory access circuitry, said functional memory including random access memory circuitry connected in parallel with field programmable gate array circuitry;
• said field programmable gate array circuitry coupled to said central processing unit so as to receive configuration data for configuring said field programmable gate array circuitry from said central processing unit, said configuration data defining what memory addresses said field programmable gate array circuitry will be responsive to and what computation functions said field programmable gate array circuitry will perform;
• said field programmable gate array circuitry including input registers for storing data received from said central processing unit when said central processing unit's memory access circuitry asserts a first set of memory addresses defined by said configuration data and result output circuitry for communicating the results computed by said field programmable gate array circuitry, said result output circuitry outputting result data to said central processing unit when said central processing unit's memory access circuitry asserts a second set of memory addresses defined by said configuration data;
• and
• said functional memory including access circuitry for routing data signals from said central processing unit to both said random access memory circuitry and said field programmable gate array circuitry in parallel, and for routing data signals from both said random access memory circuitry and said field programmable gate array circuitry to said central processing unit.